On Wed, Nov 22, 2023 at 08:54:25PM +0800, Andy Yan wrote:
> From: Andy Yan <andy....@rock-chips.com>
>
> The enable bit and transform offset of cluster windows should be
> cleared when it work at linear mode, or we may have a iommu fault
> issue.
>
> Signed-off-by: Andy Yan <andy....@rock-chips.com>
Reviewed-by: Sascha Hauer <s.ha...@pengutronix.de>
Sascha
> ---
>
> (no changes since v1)
>
> drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
> b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
> index 639dfebc6bd1..a019cc9bbd54 100644
> --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
> @@ -1312,6 +1312,11 @@ static void vop2_plane_atomic_update(struct drm_plane
> *plane,
> vop2_win_write(win, VOP2_WIN_AFBC_ROTATE_270, rotate_270);
> vop2_win_write(win, VOP2_WIN_AFBC_ROTATE_90, rotate_90);
> } else {
> + if (vop2_cluster_window(win)) {
> + vop2_win_write(win, VOP2_WIN_AFBC_ENABLE, 0);
> + vop2_win_write(win, VOP2_WIN_AFBC_TRANSFORM_OFFSET, 0);
> + }
> +
> vop2_win_write(win, VOP2_WIN_YRGB_VIR,
> DIV_ROUND_UP(fb->pitches[0], 4));
> }
>
> --
> 2.34.1
>
>
>
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