https://bugs.freedesktop.org/show_bug.cgi?id=69723

--- Comment #11 from Alex Deucher <ag...@yahoo.com> ---
(In reply to comment #10)
> Just to be sure: vddc is associated only to sclk and vddci to mclk, right?
> 

Not exactly.  Mclk is tied to vddci (memory interface voltage), but both mclk
and sclk (and the core display clock) are tied to vddc (core voltage).

> Also, how are a new freq and a new voltage applied to the card? Are they
> applied simultanously or sequentially? In the second case, we must be sure
> to raise voltage before frequency when pushing the performances up, while we
> should low the frequency before lowering the voltage when we are slowing
> down.

The actual adjustments are done by a microcontroller on the GPU.  You pass a
set of structures defining the performance levels within the power state to the
microcontroller and the microcontroller handles the switching.  It takes into
account all of the ordering and chip state dependencies.

-- 
You are receiving this mail because:
You are the assignee for the bug.
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

Reply via email to