On 2023-06-04 06:13:07, Dmitry Baryshkov wrote:
> Currently the driver passes the PINGPONG index to
> dpu_hw_intf_ops::bind_pingpong_blk() callback and uses separate boolean
> flag to tell whether INTF should be bound or unbound. Simplify this by
> passing PINGPONG_NONE in case of unbinding and drop the flag completely.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.barysh...@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suij...@somainline.org>
> ---
>
> Changes since v1:
> - Dropped != PINGPONG_NONE (Marijn)
>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 4 ++--
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 4 +---
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 1 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 3 +--
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h | 1 -
> 5 files changed, 4 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> index 2e1873d29c4b..3e543d664c98 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> @@ -2090,8 +2090,8 @@ void dpu_encoder_helper_phys_cleanup(struct
> dpu_encoder_phys *phys_enc)
> for (i = 0; i < dpu_enc->num_phys_encs; i++) {
> if (dpu_enc->phys_encs[i] &&
> phys_enc->hw_intf->ops.bind_pingpong_blk)
> phys_enc->hw_intf->ops.bind_pingpong_blk(
> - dpu_enc->phys_encs[i]->hw_intf,
> false,
> -
> dpu_enc->phys_encs[i]->hw_pp->idx);
> + dpu_enc->phys_encs[i]->hw_intf,
> + PINGPONG_NONE);
>
> /* mark INTF flush as pending */
> if (phys_enc->hw_ctl->ops.update_pending_flush_intf)
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
> index 4f8c9187f76d..107f0eff958c 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
> @@ -66,7 +66,6 @@ static void _dpu_encoder_phys_cmd_update_intf_cfg(
> if (test_bit(DPU_CTL_ACTIVE_CFG, &ctl->caps->features) &&
> phys_enc->hw_intf->ops.bind_pingpong_blk)
> phys_enc->hw_intf->ops.bind_pingpong_blk(
> phys_enc->hw_intf,
> - true,
> phys_enc->hw_pp->idx);
> }
>
> @@ -553,8 +552,7 @@ static void dpu_encoder_phys_cmd_disable(struct
> dpu_encoder_phys *phys_enc)
> if (phys_enc->hw_intf->ops.bind_pingpong_blk) {
> phys_enc->hw_intf->ops.bind_pingpong_blk(
> phys_enc->hw_intf,
> - false,
> - phys_enc->hw_pp->idx);
> + PINGPONG_NONE);
>
> ctl = phys_enc->hw_ctl;
> ctl->ops.update_pending_flush_intf(ctl, phys_enc->hw_intf->idx);
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
> index e26629e9e303..662d74ded1b9 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
> @@ -287,7 +287,6 @@ static void dpu_encoder_phys_vid_setup_timing_engine(
> if (phys_enc->hw_intf->ops.bind_pingpong_blk)
> phys_enc->hw_intf->ops.bind_pingpong_blk(
> phys_enc->hw_intf,
> - true,
> phys_enc->hw_pp->idx);
>
> if (phys_enc->hw_pp->merge_3d)
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
> index 5dce18236d87..530f82e34c1e 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
> @@ -267,7 +267,6 @@ static void dpu_hw_intf_setup_prg_fetch(
>
> static void dpu_hw_intf_bind_pingpong_blk(
> struct dpu_hw_intf *intf,
> - bool enable,
> const enum dpu_pingpong pp)
> {
> struct dpu_hw_blk_reg_map *c = &intf->hw;
> @@ -276,7 +275,7 @@ static void dpu_hw_intf_bind_pingpong_blk(
> mux_cfg = DPU_REG_READ(c, INTF_MUX);
> mux_cfg &= ~0xf;
>
> - if (enable)
> + if (pp)
> mux_cfg |= (pp - PINGPONG_0) & 0x7;
> else
> mux_cfg |= 0xf;
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h
> index 73b0885918f8..33895eca1211 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h
> @@ -88,7 +88,6 @@ struct dpu_hw_intf_ops {
> u32 (*get_line_count)(struct dpu_hw_intf *intf);
>
> void (*bind_pingpong_blk)(struct dpu_hw_intf *intf,
> - bool enable,
> const enum dpu_pingpong pp);
> void (*setup_misr)(struct dpu_hw_intf *intf, bool enable, u32
> frame_count);
> int (*collect_misr)(struct dpu_hw_intf *intf, u32 *misr_value);
> --
> 2.39.2
>
