Hi Fei, On Wed, Apr 19, 2023 at 02:12:13PM -0700, fei.y...@intel.com wrote: > From: Madhumitha Tolakanahalli Pradeep > <madhumitha.tolakanahalli.prad...@intel.com> > > On MTL, GT can no longer allocate on LLC - only the CPU can. > This, along with addition of support for L4 cache calls for > a MOCS/PAT table update. > Also the PAT index registers are multicasted for primary GT, > and there is an address jump from index 7 to 8. This patch > makes sure that these registers are programmed in the proper > way. > > BSpec: 44509, 45101, 44235 > > Cc: Matt Roper <matthew.d.ro...@intel.com> > Cc: Lucas De Marchi <lucas.demar...@intel.com> > Signed-off-by: Madhumitha Tolakanahalli Pradeep > <madhumitha.tolakanahalli.prad...@intel.com> > Signed-off-by: Aravind Iddamsetty <aravind.iddamse...@intel.com> > Signed-off-by: Nirmoy Das <nirmoy....@intel.com> > Signed-off-by: Fei Yang <fei.y...@intel.com>
I think nothing open left here. Reviewed-by: Andi Shyti <andi.sh...@linux.intel.com> Reviewed-by: Andrzej Hajda <andrzej.ha...@intel.com> Reviewed-by: Nirmoy Das <nirmoy....@intel.com> Andi
