From: zain wang <w...@rock-chips.com>
Some panels' DP_PSR_STATUS (DPCD 0x2008) may be unstable when we
enable psr. If we get the unexpected psr state, We need try the
debounce to ensure the panel was in PSR
Signed-off-by: zain wang <w...@rock-chips.com>
Signed-off-by: Chris Zhong <z...@rock-chips.com>
Commit-Ready: Kristian H. Kristensen <hoegsb...@chromium.org>
Tested-by: Kristian H. Kristensen <hoegsb...@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsb...@chromium.org>
Tested-by: Kencp huang <kencp_hu...@asus.corp-partner.google.com>
Signed-off-by: Kencp huang <kencp_hu...@asus.corp-partner.google.com>
---
.../gpu/drm/bridge/analogix/analogix_dp_reg.c | 71 +++++++++++--------
1 file changed, 42 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index 6a4f20fccf84..7b6e3f8f85b0 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
@@ -935,25 +935,54 @@ void analogix_dp_enable_psr_crc(struct analogix_dp_device
*dp)
writel(PSR_VID_CRC_ENABLE, dp->reg_base + ANALOGIX_DP_CRC_CON);
}
-static ssize_t analogix_dp_get_psr_status(struct analogix_dp_device *dp)
+static int analogix_dp_get_psr_status(struct analogix_dp_device *dp,
+ int status)
{
ssize_t val;
- u8 status;
+ u8 reg, store = 0;
+ int cnt = 0;
+
+ /* About 3ms for a loop */
+ while (cnt < 100) {
+ /* Read operation would takes 900us */
+ val = drm_dp_dpcd_readb(&dp->aux, DP_PSR_STATUS, ®);
+ if (val < 0) {
+ dev_err(dp->dev, "PSR_STATUS read failed ret=%zd", val);
+ return val;
+ }
+
+ /*
+ * Ensure the PSR_STATE should go to DP_PSR_SINK_ACTIVE_RFB
+ * from DP_PSR_SINK_ACTIVE_SINK_SYNCED or
+ * DP_PSR_SINK_ACTIVE_SRC_SYNCED.
+ * Otherwise, if we get DP_PSR_SINK_ACTIVE_RFB twice in
+ * succession, it show the Panel is stable PSR enabled state.
+ */
+ if (status == DP_PSR_SINK_ACTIVE_RFB) {
+ if ((reg == DP_PSR_SINK_ACTIVE_RFB) &&
+ ((store == DP_PSR_SINK_ACTIVE_SINK_SYNCED) ||
+ (store == DP_PSR_SINK_ACTIVE_SRC_SYNCED) ||
+ (store == DP_PSR_SINK_ACTIVE_RFB)))
+ return 0;
+ else
+ store = reg;
+ } else {
+ if ((reg == DP_PSR_SINK_INACTIVE) ||
+ (reg == DP_PSR_SINK_ACTIVE_RESYNC))
+ return 0;
+ }
- val = drm_dp_dpcd_readb(&dp->aux, DP_PSR_STATUS, &status);
- if (val < 0) {
- dev_err(dp->dev, "PSR_STATUS read failed ret=%zd", val);
- return val;
+ usleep_range(2100, 2200);
+ cnt++;
}
- return status;
+
+ return -ETIMEDOUT;
}
int analogix_dp_send_psr_spd(struct analogix_dp_device *dp,
struct dp_sdp *vsc, bool blocking)
{
unsigned int val;
- int ret;
- ssize_t psr_status;
/* don't send info frame */
val = readl(dp->reg_base + ANALOGIX_DP_PKT_SEND_CTL);
@@ -998,26 +1027,10 @@ int analogix_dp_send_psr_spd(struct analogix_dp_device
*dp,
if (!blocking)
return 0;
- /*
- * db[1]!=0: entering PSR, wait for fully active remote frame buffer.
- * db[1]==0: exiting PSR, wait for either
- * (a) ACTIVE_RESYNC - the sink "must display the
- * incoming active frames from the Source device with no visible
- * glitches and/or artifacts", even though timings may still be
- * re-synchronizing; or
- * (b) INACTIVE - the transition is fully complete.
- */
- ret = readx_poll_timeout(analogix_dp_get_psr_status, dp, psr_status,
- psr_status >= 0 &&
- ((vsc->db[1] && psr_status == DP_PSR_SINK_ACTIVE_RFB) ||
- (!vsc->db[1] && (psr_status == DP_PSR_SINK_ACTIVE_RESYNC ||
- psr_status == DP_PSR_SINK_INACTIVE))),
- 1500, DP_TIMEOUT_PSR_LOOP_MS * 1000);
- if (ret) {
- dev_warn(dp->dev, "Failed to apply PSR %d\n", ret);
- return ret;
- }
- return 0;
+ if (vsc->db[1])
+ return analogix_dp_get_psr_status(dp, DP_PSR_SINK_ACTIVE_RFB);
+ else
+ return analogix_dp_get_psr_status(dp, 0);
}
ssize_t analogix_dp_transfer(struct analogix_dp_device *dp,
--
2.34.1
