Add support for the DSS controller on TI's new AM625 SoC in the tidss
driver.

The first video port (VP0) in am625-dss can output OLDI signals through
2 OLDI TXes. A 3rd output port has been added with "DISPC_PORT_OLDI" bus
type.

Signed-off-by: Aradhya Bhatia <a-bhat...@ti.com>
---
 drivers/gpu/drm/tidss/tidss_dispc.c | 57 +++++++++++++++++++++++++++++
 drivers/gpu/drm/tidss/tidss_dispc.h |  2 +
 drivers/gpu/drm/tidss/tidss_drv.c   |  1 +
 3 files changed, 60 insertions(+)

diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c 
b/drivers/gpu/drm/tidss/tidss_dispc.c
index c1c4faccbddc..b55ccbcaa67f 100644
--- a/drivers/gpu/drm/tidss/tidss_dispc.c
+++ b/drivers/gpu/drm/tidss/tidss_dispc.c
@@ -140,6 +140,58 @@ static const u16 
tidss_am65x_common_regs[DISPC_COMMON_REG_TABLE_LEN] = {
        [DISPC_SECURE_DISABLE_OFF] =            0xac,
 };
 
+const struct dispc_features dispc_am625_feats = {
+       .max_pclk_khz = {
+               [DISPC_PORT_DPI] = 165000,
+               [DISPC_PORT_OLDI] = 165000,
+       },
+
+       .scaling = {
+               .in_width_max_5tap_rgb = 1280,
+               .in_width_max_3tap_rgb = 2560,
+               .in_width_max_5tap_yuv = 2560,
+               .in_width_max_3tap_yuv = 4096,
+               .upscale_limit = 16,
+               .downscale_limit_5tap = 4,
+               .downscale_limit_3tap = 2,
+               /*
+                * The max supported pixel inc value is 255. The value
+                * of pixel inc is calculated like this: 1+(xinc-1)*bpp.
+                * The maximum bpp of all formats supported by the HW
+                * is 8. So the maximum supported xinc value is 32,
+                * because 1+(32-1)*8 < 255 < 1+(33-1)*4.
+                */
+               .xinc_max = 32,
+       },
+
+       .subrev = DISPC_AM625,
+
+       .common = "common",
+       .common_regs = tidss_am65x_common_regs,
+
+       .num_vps = 2,
+       .vp_name = { "vp1", "vp2" },
+       .ovr_name = { "ovr1", "ovr2" },
+       .vpclk_name =  { "vp1", "vp2" },
+
+       .vp_feat = { .color = {
+                       .has_ctm = true,
+                       .gamma_size = 256,
+                       .gamma_type = TIDSS_GAMMA_8BIT,
+               },
+       },
+
+       .num_planes = 2,
+       /* note: vid is plane_id 0 and vidl1 is plane_id 1 */
+       .vid_name = { "vid", "vidl1" },
+       .vid_lite = { false, true, },
+       .vid_order = { 1, 0 },
+
+       /* 3rd output port is not representative of a 3rd pipeline */
+       .num_output_ports = 3,
+       .output_port_bus_type = { DISPC_PORT_OLDI, DISPC_PORT_DPI, 
DISPC_PORT_OLDI },
+};
+
 const struct dispc_features dispc_am65x_feats = {
        .max_pclk_khz = {
                [DISPC_PORT_DPI] = 165000,
@@ -783,6 +835,7 @@ dispc_irq_t dispc_read_and_clear_irqstatus(struct 
dispc_device *dispc)
        switch (dispc->feat->subrev) {
        case DISPC_K2G:
                return dispc_k2g_read_and_clear_irqstatus(dispc);
+       case DISPC_AM625:
        case DISPC_AM65X:
        case DISPC_J721E:
                return dispc_k3_read_and_clear_irqstatus(dispc);
@@ -798,6 +851,7 @@ void dispc_set_irqenable(struct dispc_device *dispc, 
dispc_irq_t mask)
        case DISPC_K2G:
                dispc_k2g_set_irqenable(dispc, mask);
                break;
+       case DISPC_AM625:
        case DISPC_AM65X:
        case DISPC_J721E:
                dispc_k3_set_irqenable(dispc, mask);
@@ -1288,6 +1342,7 @@ void dispc_ovr_set_plane(struct dispc_device *dispc, u32 
hw_plane,
                dispc_k2g_ovr_set_plane(dispc, hw_plane, hw_videoport,
                                        x, y, layer);
                break;
+       case DISPC_AM625:
        case DISPC_AM65X:
                dispc_am65x_ovr_set_plane(dispc, hw_plane, hw_videoport,
                                          x, y, layer);
@@ -2210,6 +2265,7 @@ static void dispc_plane_init(struct dispc_device *dispc)
        case DISPC_K2G:
                dispc_k2g_plane_init(dispc);
                break;
+       case DISPC_AM625:
        case DISPC_AM65X:
        case DISPC_J721E:
                dispc_k3_plane_init(dispc);
@@ -2316,6 +2372,7 @@ static void dispc_vp_write_gamma_table(struct 
dispc_device *dispc,
        case DISPC_K2G:
                dispc_k2g_vp_write_gamma_table(dispc, hw_videoport);
                break;
+       case DISPC_AM625:
        case DISPC_AM65X:
                dispc_am65x_vp_write_gamma_table(dispc, hw_videoport);
                break;
diff --git a/drivers/gpu/drm/tidss/tidss_dispc.h 
b/drivers/gpu/drm/tidss/tidss_dispc.h
index 30fb44158347..971f2856f015 100644
--- a/drivers/gpu/drm/tidss/tidss_dispc.h
+++ b/drivers/gpu/drm/tidss/tidss_dispc.h
@@ -59,6 +59,7 @@ enum dispc_port_bus_type {
 
 enum dispc_dss_subrevision {
        DISPC_K2G,
+       DISPC_AM625,
        DISPC_AM65X,
        DISPC_J721E,
 };
@@ -87,6 +88,7 @@ struct dispc_features {
 };
 
 extern const struct dispc_features dispc_k2g_feats;
+extern const struct dispc_features dispc_am625_feats;
 extern const struct dispc_features dispc_am65x_feats;
 extern const struct dispc_features dispc_j721e_feats;
 
diff --git a/drivers/gpu/drm/tidss/tidss_drv.c 
b/drivers/gpu/drm/tidss/tidss_drv.c
index 2dac8727d2f4..8558dc6999d8 100644
--- a/drivers/gpu/drm/tidss/tidss_drv.c
+++ b/drivers/gpu/drm/tidss/tidss_drv.c
@@ -232,6 +232,7 @@ static void tidss_shutdown(struct platform_device *pdev)
 
 static const struct of_device_id tidss_of_table[] = {
        { .compatible = "ti,k2g-dss", .data = &dispc_k2g_feats, },
+       { .compatible = "ti,am625-dss", .data = &dispc_am625_feats, },
        { .compatible = "ti,am65x-dss", .data = &dispc_am65x_feats, },
        { .compatible = "ti,j721e-dss", .data = &dispc_j721e_feats, },
        { }
-- 
2.39.0

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