On 11/15/2022 1:11 AM, Rob Clark wrote:
From: Rob Clark <robdcl...@chromium.org>
If we get an error (other than -ENOENT) we need to propagate that up the
stack. Otherwise if the nvmem driver hasn't probed yet, we'll end up with
whatever OPP(s) are represented by bit zero.
Fixed: fe7952c629da ("drm/msm: Add speed-bin support to a618 gpu")
Signed-off-by: Rob Clark <robdcl...@chromium.org>
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index 7fe60c65a1eb..96de2202c86c 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
@@ -1956,7 +1956,7 @@ static int a6xx_set_supported_hw(struct device *dev,
struct adreno_rev rev)
DRM_DEV_ERROR(dev,
"failed to read speed-bin (%d). Some OPPs may not be
supported by hardware",
I just noticed and was going to send a similar fix. We should remove ".
Some OPPs may not be supported by hardware" here.
Reviewed-by: Akhil P Oommen <quic_akhi...@quicinc.com>
Btw, on msm-next-external-fixes + this fix, I still see boot up issue
in herobrine due to drm_dev_alloc() failure with -ENOSPC error.
-Akhil.
ret);
- goto done;
+ return ret;
}
supp_hw = fuse_to_supp_hw(dev, rev, speedbin);
