FIELD_PREP and REG_FIELD_PREP have checks requiring a compile time constant mask. When the mask comes in as the argument of a function these checks can can fail depending on the compiler (gcc vs clang), optimization level, etc. Use a simpler local version of FIELD_PREP which skips these checks. The checks are not needed because the mask is formed using REG_GENMASK (so is actually a compile time constant).
Bug: https://gitlab.freedesktop.org/drm/intel/-/issues/7354 Signed-off-by: Ashutosh Dixit <ashutosh.di...@intel.com> --- drivers/gpu/drm/i915/i915_hwmon.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_hwmon.c b/drivers/gpu/drm/i915/i915_hwmon.c index 9e97814930254..a3ec9a73a4e49 100644 --- a/drivers/gpu/drm/i915/i915_hwmon.c +++ b/drivers/gpu/drm/i915/i915_hwmon.c @@ -62,6 +62,12 @@ struct i915_hwmon { int scl_shift_time; }; +/* FIELD_PREP and REG_FIELD_PREP require a compile time constant mask */ +static u32 hwm_field_prep(u32 mask, u32 val) +{ + return (val << __bf_shf(mask)) & mask; +} + static void hwm_locked_with_pm_intel_uncore_rmw(struct hwm_drvdata *ddat, i915_reg_t reg, u32 clear, u32 set) @@ -112,7 +118,7 @@ hwm_field_scale_and_write(struct hwm_drvdata *ddat, i915_reg_t rgadr, nval = DIV_ROUND_CLOSEST_ULL((u64)lval << nshift, scale_factor); bits_to_clear = field_msk; - bits_to_set = FIELD_PREP(field_msk, nval); + bits_to_set = hwm_field_prep(field_msk, nval); hwm_locked_with_pm_intel_uncore_rmw(ddat, rgadr, bits_to_clear, bits_to_set); -- 2.38.0
