On Tue, Sep 20, 2022 at 12:59 AM Guillaume Ranquet <granq...@baylibre.com> wrote: > > From: Pablo Sun <pablo....@mediatek.com> > > Add the clock gate definition for the DPI1 hardware > in VDOSYS1. > > The parent clock "hdmi_txpll" is already defined in > `mt8195.dtsi`. > > Signed-off-by: Pablo Sun <pablo....@mediatek.com> > Signed-off-by: Guillaume Ranquet <granq...@baylibre.com>
Reviewed-by: Chen-Yu Tsai <we...@chromium.org>
