On Thu, 11 Aug 2022, Ankit Nautiyal <ankit.k.nauti...@intel.com> wrote:
> Move the DSC parsing logic into separate function.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nauti...@intel.com>
Reviewed-by: Jani Nikula <jani.nik...@intel.com>
> ---
> drivers/gpu/drm/drm_edid.c | 128 ++++++++++++++++++++-----------------
> 1 file changed, 69 insertions(+), 59 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> index cdf10279e1bd..ffff1d08b3a4 100644
> --- a/drivers/gpu/drm/drm_edid.c
> +++ b/drivers/gpu/drm/drm_edid.c
> @@ -5703,6 +5703,73 @@ static void drm_parse_ycbcr420_deep_color_info(struct
> drm_connector *connector,
> hdmi->y420_dc_modes = dc_mask;
> }
>
> +static void drm_parse_dsc_info(struct drm_hdmi_dsc_cap *hdmi_dsc,
> + const u8 *hf_scds)
> +{
> + u8 dsc_max_slices;
> + u8 dsc_max_frl_rate;
> +
> + hdmi_dsc->v_1p2 = hf_scds[11] & DRM_EDID_DSC_1P2;
> +
> + if (!hdmi_dsc->v_1p2)
> + return;
> +
> + hdmi_dsc->native_420 = hf_scds[11] & DRM_EDID_DSC_NATIVE_420;
> + hdmi_dsc->all_bpp = hf_scds[11] & DRM_EDID_DSC_ALL_BPP;
> +
> + if (hf_scds[11] & DRM_EDID_DSC_16BPC)
> + hdmi_dsc->bpc_supported = 16;
> + else if (hf_scds[11] & DRM_EDID_DSC_12BPC)
> + hdmi_dsc->bpc_supported = 12;
> + else if (hf_scds[11] & DRM_EDID_DSC_10BPC)
> + hdmi_dsc->bpc_supported = 10;
> + else
> + /* Supports min 8 BPC if DSC1.2 is supported*/
> + hdmi_dsc->bpc_supported = 8;
> +
> + dsc_max_frl_rate = (hf_scds[12] & DRM_EDID_DSC_MAX_FRL_RATE_MASK) >> 4;
> + drm_get_max_frl_rate(dsc_max_frl_rate, &hdmi_dsc->max_lanes,
> + &hdmi_dsc->max_frl_rate_per_lane);
> + hdmi_dsc->total_chunk_kbytes = hf_scds[13] &
> DRM_EDID_DSC_TOTAL_CHUNK_KBYTES;
> +
> + dsc_max_slices = hf_scds[12] & DRM_EDID_DSC_MAX_SLICES;
> +
> + switch (dsc_max_slices) {
> + case 1:
> + hdmi_dsc->max_slices = 1;
> + hdmi_dsc->clk_per_slice = 340;
> + break;
> + case 2:
> + hdmi_dsc->max_slices = 2;
> + hdmi_dsc->clk_per_slice = 340;
> + break;
> + case 3:
> + hdmi_dsc->max_slices = 4;
> + hdmi_dsc->clk_per_slice = 340;
> + break;
> + case 4:
> + hdmi_dsc->max_slices = 8;
> + hdmi_dsc->clk_per_slice = 340;
> + break;
> + case 5:
> + hdmi_dsc->max_slices = 8;
> + hdmi_dsc->clk_per_slice = 400;
> + break;
> + case 6:
> + hdmi_dsc->max_slices = 12;
> + hdmi_dsc->clk_per_slice = 400;
> + break;
> + case 7:
> + hdmi_dsc->max_slices = 16;
> + hdmi_dsc->clk_per_slice = 400;
> + break;
> + case 0:
> + default:
> + hdmi_dsc->max_slices = 0;
> + hdmi_dsc->clk_per_slice = 0;
> + }
> +}
> +
> /* Sink Capability Data Structure */
> static void drm_parse_hdmi_forum_scds(struct drm_connector *connector,
> const u8 *hf_scds)
> @@ -5749,71 +5816,14 @@ static void drm_parse_hdmi_forum_scds(struct
> drm_connector *connector,
>
> if (hf_scds[7]) {
> u8 max_frl_rate;
> - u8 dsc_max_frl_rate;
> - u8 dsc_max_slices;
> struct drm_hdmi_dsc_cap *hdmi_dsc = &hdmi->dsc_cap;
>
> DRM_DEBUG_KMS("hdmi_21 sink detected. parsing edid\n");
> max_frl_rate = (hf_scds[7] & DRM_EDID_MAX_FRL_RATE_MASK) >> 4;
> drm_get_max_frl_rate(max_frl_rate, &hdmi->max_lanes,
> &hdmi->max_frl_rate_per_lane);
> - hdmi_dsc->v_1p2 = hf_scds[11] & DRM_EDID_DSC_1P2;
> -
> - if (hdmi_dsc->v_1p2) {
> - hdmi_dsc->native_420 = hf_scds[11] &
> DRM_EDID_DSC_NATIVE_420;
> - hdmi_dsc->all_bpp = hf_scds[11] & DRM_EDID_DSC_ALL_BPP;
> -
> - if (hf_scds[11] & DRM_EDID_DSC_16BPC)
> - hdmi_dsc->bpc_supported = 16;
> - else if (hf_scds[11] & DRM_EDID_DSC_12BPC)
> - hdmi_dsc->bpc_supported = 12;
> - else if (hf_scds[11] & DRM_EDID_DSC_10BPC)
> - hdmi_dsc->bpc_supported = 10;
> - else
> - /* Supports min 8 BPC if DSC1.2 is supported*/
> - hdmi_dsc->bpc_supported = 8;
> -
> - dsc_max_frl_rate = (hf_scds[12] &
> DRM_EDID_DSC_MAX_FRL_RATE_MASK) >> 4;
> - drm_get_max_frl_rate(dsc_max_frl_rate,
> &hdmi_dsc->max_lanes,
> - &hdmi_dsc->max_frl_rate_per_lane);
> - hdmi_dsc->total_chunk_kbytes = hf_scds[13] &
> DRM_EDID_DSC_TOTAL_CHUNK_KBYTES;
> -
> - dsc_max_slices = hf_scds[12] & DRM_EDID_DSC_MAX_SLICES;
> - switch (dsc_max_slices) {
> - case 1:
> - hdmi_dsc->max_slices = 1;
> - hdmi_dsc->clk_per_slice = 340;
> - break;
> - case 2:
> - hdmi_dsc->max_slices = 2;
> - hdmi_dsc->clk_per_slice = 340;
> - break;
> - case 3:
> - hdmi_dsc->max_slices = 4;
> - hdmi_dsc->clk_per_slice = 340;
> - break;
> - case 4:
> - hdmi_dsc->max_slices = 8;
> - hdmi_dsc->clk_per_slice = 340;
> - break;
> - case 5:
> - hdmi_dsc->max_slices = 8;
> - hdmi_dsc->clk_per_slice = 400;
> - break;
> - case 6:
> - hdmi_dsc->max_slices = 12;
> - hdmi_dsc->clk_per_slice = 400;
> - break;
> - case 7:
> - hdmi_dsc->max_slices = 16;
> - hdmi_dsc->clk_per_slice = 400;
> - break;
> - case 0:
> - default:
> - hdmi_dsc->max_slices = 0;
> - hdmi_dsc->clk_per_slice = 0;
> - }
> - }
> +
> + drm_parse_dsc_info(hdmi_dsc, hf_scds);
> }
>
> drm_parse_ycbcr420_deep_color_info(connector, hf_scds);
--
Jani Nikula, Intel Open Source Graphics Center
