Fix some checkpatch.pl complained about in amdgpu_kms.c

Signed-off-by: Jingyu Wang <jingyuwang_...@163.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 16 +++++++++-------
 1 file changed, 9 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 77668c3dae5b..1f90a096232d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -532,6 +532,7 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data, 
struct drm_file *filp)
                        crtc = (struct drm_crtc *)minfo->crtcs[i];
                        if (crtc && crtc->base.id == info->mode_crtc.id) {
                                struct amdgpu_crtc *amdgpu_crtc = 
to_amdgpu_crtc(crtc);
+
                                ui32 = amdgpu_crtc->crtc_id;
                                found = 1;
                                break;
@@ -550,7 +551,7 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data, 
struct drm_file *filp)
                if (ret)
                        return ret;
 
-               ret = copy_to_user(out, &ip, min((size_t)size, sizeof(ip)));
+               ret = copy_to_user(out, &ip, min_t((size_t)size, sizeof(ip)));
                return ret ? -EFAULT : 0;
        }
        case AMDGPU_INFO_HW_IP_COUNT: {
@@ -696,17 +697,18 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data, 
struct drm_file *filp)
                                    ? -EFAULT : 0;
        }
        case AMDGPU_INFO_READ_MMR_REG: {
-               unsigned n, alloc_size;
+               unsigned int n, alloc_size;
                uint32_t *regs;
-               unsigned se_num = (info->read_mmr_reg.instance >>
+               unsigned int se_num = (info->read_mmr_reg.instance >>
                                   AMDGPU_INFO_MMR_SE_INDEX_SHIFT) &
                                  AMDGPU_INFO_MMR_SE_INDEX_MASK;
-               unsigned sh_num = (info->read_mmr_reg.instance >>
+               unsigned int sh_num = (info->read_mmr_reg.instance >>
                                   AMDGPU_INFO_MMR_SH_INDEX_SHIFT) &
                                  AMDGPU_INFO_MMR_SH_INDEX_MASK;
 
                /* set full masks if the userspace set all bits
-                * in the bitfields */
+                * in the bitfields
+                */
                if (se_num == AMDGPU_INFO_MMR_SE_INDEX_MASK)
                        se_num = 0xffffffff;
                else if (se_num >= AMDGPU_GFX_MAX_SE)
@@ -830,7 +832,7 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data, 
struct drm_file *filp)
                return ret;
        }
        case AMDGPU_INFO_VCE_CLOCK_TABLE: {
-               unsigned i;
+               unsigned int i;
                struct drm_amdgpu_info_vce_clock_table vce_clk_table = {};
                struct amd_vce_state *vce_state;
 
@@ -1379,7 +1381,7 @@ static int amdgpu_debugfs_firmware_info_show(struct 
seq_file *m, void *unused)
        int ret, i;
 
        static const char *ta_fw_name[TA_FW_TYPE_MAX_INDEX] = {
-#define TA_FW_NAME(type) [TA_FW_TYPE_PSP_##type] = #type
+#define TA_FW_NAME(type) ([TA_FW_TYPE_PSP_##type] = #type)
                TA_FW_NAME(XGMI),
                TA_FW_NAME(RAS),
                TA_FW_NAME(HDCP),

base-commit: e47eb90a0a9ae20b82635b9b99a8d0979b757ad8
-- 
2.34.1

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