On Fri, 17 Jun 2022 13:25:34 -0700, Vinay Belgaumkar wrote:
>
> We have seen multiple RC6 issues where it is useful to know
> which global forcewake bits are set. Add this to the 'drpc'
> debugfs output.
A couple of optional nits below to look at but otherwise this is:
Reviewed-by: Ashutosh Dixit <ashutosh.di...@intel.com>
> +static u32 mt_fwake_status(struct intel_uncore *uncore)
> +{
> + return intel_uncore_read_fw(uncore, FORCEWAKE_MT);
> +}
> +
> static int vlv_drpc(struct seq_file *m)
> {
> struct intel_gt *gt = m->private;
> struct intel_uncore *uncore = gt->uncore;
> - u32 rcctl1, pw_status;
> + u32 rcctl1, pw_status, mt_fwake;
>
> + mt_fwake = mt_fwake_status(uncore);
I would get rid of the function and just duplicate the intel_uncore_read_fw().
> pw_status = intel_uncore_read(uncore, VLV_GTLC_PW_STATUS);
> rcctl1 = intel_uncore_read(uncore, GEN6_RC_CONTROL);
>
> seq_printf(m, "RC6 Enabled: %s\n",
> str_yes_no(rcctl1 & (GEN7_RC_CTL_TO_MODE |
> GEN6_RC_CTL_EI_MODE(1))));
> + seq_printf(m, "Multi-threaded Forcewake: 0x%x\n", mt_fwake);
Is "Multi-threaded Forcewake Request" (the Bspec register name) a more
descriptive print?
Same for gen6_drpc() below. Thanks!
