On 5/30/2022 12:33 AM, Haowen Bai wrote:
The ctx->hw is dereferencing before null checking, so move it after checking. Signed-off-by: Haowen Bai <baihao...@meizu.com>
Agree with Dmitry's comment. Adjust the patch subject to a different one otherwise PW thinks they are same patches.
Reviewed-by: Abhinav Kumar <quic_abhin...@quicinc.com>
--- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c index bcccce292937..e59680cdd0ce 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c @@ -155,11 +155,13 @@ static void dpu_hw_wb_roi(struct dpu_hw_wb *ctx, struct dpu_hw_wb_cfg *wb) static void dpu_hw_wb_setup_qos_lut(struct dpu_hw_wb *ctx, struct dpu_hw_wb_qos_cfg *cfg) { - struct dpu_hw_blk_reg_map *c = &ctx->hw; + struct dpu_hw_blk_reg_map *c; u32 qos_ctrl = 0;if (!ctx || !cfg)return; + + c = &ctx->hw;DPU_REG_WRITE(c, WB_DANGER_LUT, cfg->danger_lut);DPU_REG_WRITE(c, WB_SAFE_LUT, cfg->safe_lut);
