On Tue, May 10, 2022 at 3:29 AM Piotr Oniszczuk <piotr.oniszc...@gmail.com> wrote: > > > > > Wiadomość napisana przez Peter Geis <pgwipe...@gmail.com> w dniu > > 10.05.2022, o godz. 03:35: > > > > Could you grab the clock tree from /sys/kernel/debug/clk/clk_summary > > for the clk_hdmi_cec tree? > > Here it is: > enable prepare protect > duty hardware > clock count count count rate > accuracy phase cycle enable > ------------------------------------------------------------------------------------------------------- > clk_rtc32k_frac 1 1 0 32768 > 0 0 50000 Y > clk_rtc_32k 1 1 0 32768 > 0 0 50000 Y > clk_hdmi_cec 1 2 0 32768 > 0 0 50000 Y
You are on the clk_rtc32k_frac which is a fractional divider that is fed from the 24m clock. Your clock likely isn't the issue here. I'd recommend setting up the cec-gpio node to validate your hardware works.
