On Tue 08 Mar 10:54 CST 2022, Vinod Polimera wrote:
Please run:
git log --oneline --no-decorate -- arch/arm64/boot/dts/qcom/sc7280.dtsi
and make sure your $subject is prefixed according to all other
sc7280-specific changes.
> Kernel clock driver assumes that initial rate is the
> max rate for that clock and was not allowing it to scale
> beyond the assigned clock value.
>
> Drop the assigned clock rate property and vote on the mdp clock as per
> calculated value during the usecase.
>
> Changes in v2:
> - Remove assigned-clock-rate property and set mdp clk during resume sequence.
> - Add fixes tag.
>
> Changes in v3:
> - Remove extra line after fixes tag.(Stephen Boyd)
It's only in drivers/drm that the changelog goes in the commit message,
so please move this below the ---.
Thanks,
Bjorn
>
> Fixes: 62fbdce91("arm64: dts: qcom: sc7280: add display dt nodes")
> Signed-off-by: Vinod Polimera <quic_vpoli...@quicinc.com>
> Reviewed-by: Stephen Boyd <swb...@chromium.org>
> ---
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 9 ++-------
> 1 file changed, 2 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index baf1653..408cf6c 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -2856,9 +2856,6 @@
> "ahb",
> "core";
>
> - assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>;
> - assigned-clock-rates = <300000000>;
> -
> interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-controller;
> #interrupt-cells = <1>;
> @@ -2892,11 +2889,9 @@
> "lut",
> "core",
> "vsync";
> - assigned-clocks = <&dispcc
> DISP_CC_MDSS_MDP_CLK>,
> - <&dispcc
> DISP_CC_MDSS_VSYNC_CLK>,
> + assigned-clocks = <&dispcc
> DISP_CC_MDSS_VSYNC_CLK>,
> <&dispcc DISP_CC_MDSS_AHB_CLK>;
> - assigned-clock-rates = <300000000>,
> - <19200000>,
> + assigned-clock-rates = <19200000>,
> <19200000>;
> operating-points-v2 = <&mdp_opp_table>;
> power-domains = <&rpmhpd SC7280_CX>;
> --
> 2.7.4
>
