On Mon 22 Nov 05:29 CST 2021, Sankeerth Billakanti wrote:
> From: Kuogee Hsieh <khs...@codeaurora.org>
>
> Signed-off-by: Kuogee Hsieh <quic_khs...@quicinc.com>
> Reviewed-by: Stephen Boyd <swb...@chromium.org>
> Signed-off-by: Sankeerth Billakanti <quic_sbill...@quicinc.com>
Can you please update this to make From: and Signed-off-by: match.
Also I don't know how you prepared this patch series, because this says
patch 4/4, but it's not part of the same series as the other patches.
I did pick up the first 3 patches, but then noticed that you are back
at using the original labels, so please see below and send all 4 patches
in a proper series.
> ---
>
> Changes in v4:
> - Add the patch to display DT change series (Bjorn Andersson)
> - Remove the trailing whitespaces
>
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 90
> +++++++++++++++++++++++++++++++++++-
> 1 file changed, 88 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index 5ad500e..0b2ffd5 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -2693,8 +2693,8 @@
> <&gcc GCC_DISP_GPLL0_CLK_SRC>,
> <&dsi_phy 0>,
> <&dsi_phy 1>,
> - <0>,
> - <0>,
> + <&dp_phy 0>,
> + <&dp_phy 1>,
> <&edp_phy 0>,
> <&edp_phy 1>;
> clock-names = "bi_tcxo",
> @@ -2791,6 +2791,13 @@
> remote-endpoint =
> <&edp_in>;
> };
> };
> +
> + port@2 {
> + reg = <2>;
> + dpu_intf0_out: endpoint {
> + remote-endpoint =
> <&dp_in>;
> + };
> + };
> };
>
> mdp_opp_table: opp-table {
> @@ -3002,6 +3009,79 @@
>
> status = "disabled";
> };
> +
> + msm_dp: displayport-controller@ae90000 {
As requested previously, can you please label this mdss_dp, to make it
sort nicely in the dts?
Thanks,
Bjorn
> + compatible = "qcom,sc7280-dp";
> +
> + reg = <0 0x0ae90000 0 0x1400>;
> +
> + interrupt-parent = <&mdss>;
> + interrupts = <12>;
> +
> + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
> + <&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
> + <&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
> + <&dispcc
> DISP_CC_MDSS_DP_LINK_INTF_CLK>,
> + <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
> + clock-names = "core_iface",
> + "core_aux",
> + "ctrl_link",
> + "ctrl_link_iface",
> + "stream_pixel";
> + #clock-cells = <1>;
> + assigned-clocks = <&dispcc
> DISP_CC_MDSS_DP_LINK_CLK_SRC>,
> + <&dispcc
> DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
> + assigned-clock-parents = <&dp_phy 0>, <&dp_phy
> 1>;
> + phys = <&dp_phy>;
> + phy-names = "dp";
> +
> + operating-points-v2 = <&dp_opp_table>;
> + power-domains = <&rpmhpd SC7280_CX>;
> +
> + #sound-dai-cells = <0>;
> +
> + status = "disabled";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + port@0 {
> + reg = <0>;
> + dp_in: endpoint {
> + remote-endpoint =
> <&dpu_intf0_out>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + dp_out: endpoint { };
> + };
> + };
> +
> + dp_opp_table: opp-table {
> + compatible = "operating-points-v2";
> +
> + opp-160000000 {
> + opp-hz = /bits/ 64 <160000000>;
> + required-opps =
> <&rpmhpd_opp_low_svs>;
> + };
> +
> + opp-270000000 {
> + opp-hz = /bits/ 64 <270000000>;
> + required-opps =
> <&rpmhpd_opp_svs>;
> + };
> +
> + opp-540000000 {
> + opp-hz = /bits/ 64 <540000000>;
> + required-opps =
> <&rpmhpd_opp_svs_l1>;
> + };
> +
> + opp-810000000 {
> + opp-hz = /bits/ 64 <810000000>;
> + required-opps =
> <&rpmhpd_opp_nom>;
> + };
> + };
> + };
> };
>
> pdc: interrupt-controller@b220000 {
> @@ -3104,6 +3184,12 @@
> bias-pull-up;
> };
>
> + dp_hot_plug_det: dp-hot-plug-det {
> + pins = "gpio47";
> + function = "dp_hot";
> + bias-disable;
> + };
> +
> qspi_clk: qspi-clk {
> pins = "gpio14";
> function = "qspi_clk";
> --
> 2.7.4
>
