[PATCH 08/12] arm64: dts: rockchip: rk356x: Add VOP2 nodes

[Sascha Hauer]

The VOP2 is the display output controller on the RK3568. Add the node
for it to the dtsi file along with the required display-subsystem node
and the iommu node.

Signed-off-by: Sascha Hauer <s.ha...@pengutronix.de>
---
 arch/arm64/boot/dts/rockchip/rk356x.dtsi | 52 ++++++++++++++++++++++++
 1 file changed, 52 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi 
b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index 46d9552f60284..6ebf7c14e096a 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -447,6 +447,58 @@ gmac1_mtl_tx_setup: tx-queues-config {
                };
        };
 
+       display_subsystem: display-subsystem {
+               compatible = "rockchip,display-subsystem";
+               ports = <&vop_out>;
+       };
+
+       vop: vop@fe040000 {
+               compatible = "rockchip,rk3568-vop";
+               reg = <0x0 0xfe040000 0x0 0x3000>, <0x0 0xfe044000 0x0 0x1000>;
+               reg-names = "regs", "gamma_lut";
+               rockchip,grf = <&grf>;
+               interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>, <&cru DCLK_VOP0>, 
<&cru DCLK_VOP1>, <&cru DCLK_VOP2>;
+               clock-names = "aclk_vop", "hclk_vop", "dclk_vp0", "dclk_vp1", 
"dclk_vp2";
+               iommus = <&vop_mmu>;
+               power-domains = <&power RK3568_PD_VO>;
+               status = "disabled";
+
+               vop_out: ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       vp0: port@0 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               reg = <0>;
+                       };
+
+                       vp1: port@1 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               reg = <1>;
+                       };
+
+                       vp2: port@2 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               reg = <2>;
+                       };
+               };
+       };
+
+       vop_mmu: iommu@fe043e00 {
+               compatible = "rockchip,rk3568-iommu";
+               reg = <0x0 0xfe043e00 0x0 0x100>, <0x0 0xfe043f00 0x0 0x100>;
+               interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "vop_mmu";
+               clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>;
+               clock-names = "aclk", "iface";
+               #iommu-cells = <0>;
+               status = "disabled";
+       };
+
        qos_gpu: qos@fe128000 {
                compatible = "rockchip,rk3568-qos", "syscon";
                reg = <0x0 0xfe128000 0x0 0x20>;
-- 
2.30.2