On KMB, ADV bridge must be programmed and powered on prior to
MIPI DSI HW initialization.

v2: changed to atomic_bridge_chain_enable (Sam)

Fixes: 98521f4d4b4c ("drm/kmb: Mipi DSI part of the display driver")
Co-developed-by: Edmund Dea <edmund.j....@intel.com>
Signed-off-by: Anitha Chrisanthus <anitha.chrisant...@intel.com>
---
 drivers/gpu/drm/kmb/kmb_crtc.c | 7 ++++---
 drivers/gpu/drm/kmb/kmb_dsi.c  | 9 +++++----
 drivers/gpu/drm/kmb/kmb_dsi.h  | 2 +-
 3 files changed, 10 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/kmb/kmb_crtc.c b/drivers/gpu/drm/kmb/kmb_crtc.c
index 44327bc629ca..4f240466cf63 100644
--- a/drivers/gpu/drm/kmb/kmb_crtc.c
+++ b/drivers/gpu/drm/kmb/kmb_crtc.c
@@ -66,7 +66,8 @@ static const struct drm_crtc_funcs kmb_crtc_funcs = {
        .disable_vblank = kmb_crtc_disable_vblank,
 };
 
-static void kmb_crtc_set_mode(struct drm_crtc *crtc)
+static void kmb_crtc_set_mode(struct drm_crtc *crtc,
+                             struct drm_atomic_state *old_state)
 {
        struct drm_device *dev = crtc->dev;
        struct drm_display_mode *m = &crtc->state->adjusted_mode;
@@ -75,7 +76,7 @@ static void kmb_crtc_set_mode(struct drm_crtc *crtc)
        unsigned int val = 0;
 
        /* Initialize mipi */
-       kmb_dsi_mode_set(kmb->kmb_dsi, m, kmb->sys_clk_mhz);
+       kmb_dsi_mode_set(kmb->kmb_dsi, m, kmb->sys_clk_mhz, old_state);
        drm_info(dev,
                 "vfp= %d vbp= %d vsync_len=%d hfp=%d hbp=%d hsync_len=%d\n",
                 m->crtc_vsync_start - m->crtc_vdisplay,
@@ -138,7 +139,7 @@ static void kmb_crtc_atomic_enable(struct drm_crtc *crtc,
        struct kmb_drm_private *kmb = crtc_to_kmb_priv(crtc);
 
        clk_prepare_enable(kmb->kmb_clk.clk_lcd);
-       kmb_crtc_set_mode(crtc);
+       kmb_crtc_set_mode(crtc, state);
        drm_crtc_vblank_on(crtc);
 }
 
diff --git a/drivers/gpu/drm/kmb/kmb_dsi.c b/drivers/gpu/drm/kmb/kmb_dsi.c
index 1793cd31b117..e4cc61fa5219 100644
--- a/drivers/gpu/drm/kmb/kmb_dsi.c
+++ b/drivers/gpu/drm/kmb/kmb_dsi.c
@@ -1322,7 +1322,8 @@ static u32 mipi_tx_init_dphy(struct kmb_dsi *kmb_dsi,
        return 0;
 }
 
-static void connect_lcd_to_mipi(struct kmb_dsi *kmb_dsi)
+static void connect_lcd_to_mipi(struct kmb_dsi *kmb_dsi,
+                               struct drm_atomic_state *old_state)
 {
        struct regmap *msscam;
 
@@ -1331,7 +1332,7 @@ static void connect_lcd_to_mipi(struct kmb_dsi *kmb_dsi)
                dev_dbg(kmb_dsi->dev, "failed to get msscam syscon");
                return;
        }
-
+       drm_atomic_bridge_chain_enable(adv_bridge, old_state);
        /* DISABLE MIPI->CIF CONNECTION */
        regmap_write(msscam, MSS_MIPI_CIF_CFG, 0);
 
@@ -1342,7 +1343,7 @@ static void connect_lcd_to_mipi(struct kmb_dsi *kmb_dsi)
 }
 
 int kmb_dsi_mode_set(struct kmb_dsi *kmb_dsi, struct drm_display_mode *mode,
-                    int sys_clk_mhz)
+                    int sys_clk_mhz, struct drm_atomic_state *old_state)
 {
        u64 data_rate;
 
@@ -1395,7 +1396,7 @@ int kmb_dsi_mode_set(struct kmb_dsi *kmb_dsi, struct 
drm_display_mode *mode,
        /* Dphy initialization */
        mipi_tx_init_dphy(kmb_dsi, &mipi_tx_init_cfg);
 
-       connect_lcd_to_mipi(kmb_dsi);
+       connect_lcd_to_mipi(kmb_dsi, old_state);
        dev_info(kmb_dsi->dev, "mipi hw initialized");
 
        return 0;
diff --git a/drivers/gpu/drm/kmb/kmb_dsi.h b/drivers/gpu/drm/kmb/kmb_dsi.h
index 66b7c500d9bc..09dc88743d77 100644
--- a/drivers/gpu/drm/kmb/kmb_dsi.h
+++ b/drivers/gpu/drm/kmb/kmb_dsi.h
@@ -380,7 +380,7 @@ int kmb_dsi_host_bridge_init(struct device *dev);
 struct kmb_dsi *kmb_dsi_init(struct platform_device *pdev);
 void kmb_dsi_host_unregister(struct kmb_dsi *kmb_dsi);
 int kmb_dsi_mode_set(struct kmb_dsi *kmb_dsi, struct drm_display_mode *mode,
-                    int sys_clk_mhz);
+                    int sys_clk_mhz, struct drm_atomic_state *old_state);
 int kmb_dsi_map_mmio(struct kmb_dsi *kmb_dsi);
 int kmb_dsi_clk_init(struct kmb_dsi *kmb_dsi);
 int kmb_dsi_encoder_init(struct drm_device *dev, struct kmb_dsi *kmb_dsi);
-- 
2.25.1

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