On Mon, Oct 11, 2021 at 09:41:44PM +0530, Ramalingam C wrote:
> From: Matthew Auld <matthew.a...@intel.com>
>
> For local-memory objects we need to align the GTT addresses to 64K, both
> for the ppgtt and ggtt.
>
> Signed-off-by: Matthew Auld <matthew.a...@intel.com>
> Signed-off-by: Stuart Summers <stuart.summ...@intel.com>
> Signed-off-by: Ramalingam C <ramalinga...@intel.com>
> Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
> Cc: Rodrigo Vivi <rodrigo.v...@intel.com>
Do we still need this with relocations removed? Userspace is picking all
the addresses for us, so all we have to check is whether userspace got it
right.
-Daniel
> ---
> drivers/gpu/drm/i915/i915_vma.c | 9 +++++++--
> 1 file changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
> index 4b7fc4647e46..1ea1fa08efdf 100644
> --- a/drivers/gpu/drm/i915/i915_vma.c
> +++ b/drivers/gpu/drm/i915/i915_vma.c
> @@ -670,8 +670,13 @@ i915_vma_insert(struct i915_vma *vma, u64 size, u64
> alignment, u64 flags)
> }
>
> color = 0;
> - if (vma->obj && i915_vm_has_cache_coloring(vma->vm))
> - color = vma->obj->cache_level;
> + if (vma->obj) {
> + if (HAS_64K_PAGES(vma->vm->i915) &&
> i915_gem_object_is_lmem(vma->obj))
> + alignment = max(alignment, I915_GTT_PAGE_SIZE_64K);
> +
> + if (i915_vm_has_cache_coloring(vma->vm))
> + color = vma->obj->cache_level;
> + }
>
> if (flags & PIN_OFFSET_FIXED) {
> u64 offset = flags & PIN_OFFSET_MASK;
> --
> 2.20.1
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
