On Thu, Sep 09, 2021 at 03:52:03PM +0300, Jani Nikula wrote:
> 128b/132b has a separate transcoder DDI mode, which also requires the
> MST transport select to be set. Note that we'll use DP MST also for
> single-stream 128b/132b.
> 
> Having the FDI and 128b/132b modes share the register mode value
> complicates things a bit.
> 
> v2:
> - Use HAS_DP20 abstraction for 128b/132b mode (Ville)
> - Use intel_dp_is_uhbr() helper
> 
> Bspec: 50493
> Signed-off-by: Jani Nikula <jani.nik...@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrj...@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c | 27 ++++++++++++++++++------
>  1 file changed, 20 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c 
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index a7b7e4fafcb3..d2b96b2efdfe 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -506,7 +506,10 @@ intel_ddi_transcoder_func_reg_val_get(struct 
> intel_encoder *encoder,
>               temp |= TRANS_DDI_MODE_SELECT_FDI_OR_128B132B;
>               temp |= (crtc_state->fdi_lanes - 1) << 1;
>       } else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST)) {
> -             temp |= TRANS_DDI_MODE_SELECT_DP_MST;
> +             if (intel_dp_is_uhbr(crtc_state))
> +                     temp |= TRANS_DDI_MODE_SELECT_FDI_OR_128B132B;
> +             else
> +                     temp |= TRANS_DDI_MODE_SELECT_DP_MST;
>               temp |= DDI_PORT_WIDTH(crtc_state->lane_count);
>  
>               if (DISPLAY_VER(dev_priv) >= 12) {
> @@ -694,7 +697,12 @@ bool intel_ddi_connector_get_hw_state(struct 
> intel_connector *intel_connector)
>               break;
>  
>       case TRANS_DDI_MODE_SELECT_FDI_OR_128B132B:
> -             ret = type == DRM_MODE_CONNECTOR_VGA;
> +             if (HAS_DP20(dev_priv))
> +                     /* 128b/132b */
> +                     ret = false;
> +             else
> +                     /* FDI */
> +                     ret = type == DRM_MODE_CONNECTOR_VGA;
>               break;
>  
>       default:
> @@ -781,8 +789,9 @@ static void intel_ddi_get_encoder_pipes(struct 
> intel_encoder *encoder,
>               if ((tmp & port_mask) != ddi_select)
>                       continue;
>  
> -             if ((tmp & TRANS_DDI_MODE_SELECT_MASK) ==
> -                 TRANS_DDI_MODE_SELECT_DP_MST)
> +             if ((tmp & TRANS_DDI_MODE_SELECT_MASK) == 
> TRANS_DDI_MODE_SELECT_DP_MST ||
> +                 (HAS_DP20(dev_priv) &&
> +                  (tmp & TRANS_DDI_MODE_SELECT_MASK) == 
> TRANS_DDI_MODE_SELECT_FDI_OR_128B132B))
>                       mst_pipe_mask |= BIT(p);
>  
>               *pipe_mask |= BIT(p);
> @@ -3573,9 +3582,6 @@ static void intel_ddi_read_func_ctl(struct 
> intel_encoder *encoder,
>               pipe_config->output_types |= BIT(INTEL_OUTPUT_HDMI);
>               pipe_config->lane_count = 4;
>               break;
> -     case TRANS_DDI_MODE_SELECT_FDI_OR_128B132B:
> -             pipe_config->output_types |= BIT(INTEL_OUTPUT_ANALOG);
> -             break;
>       case TRANS_DDI_MODE_SELECT_DP_SST:
>               if (encoder->type == INTEL_OUTPUT_EDP)
>                       pipe_config->output_types |= BIT(INTEL_OUTPUT_EDP);
> @@ -3604,6 +3610,13 @@ static void intel_ddi_read_func_ctl(struct 
> intel_encoder *encoder,
>                       pipe_config->infoframes.enable |=
>                               intel_hdmi_infoframes_enabled(encoder, 
> pipe_config);
>               break;
> +     case TRANS_DDI_MODE_SELECT_FDI_OR_128B132B:
> +             if (!HAS_DP20(dev_priv)) {
> +                     /* FDI */
> +                     pipe_config->output_types |= BIT(INTEL_OUTPUT_ANALOG);
> +                     break;
> +             }
> +             fallthrough; /* 128b/132b */
>       case TRANS_DDI_MODE_SELECT_DP_MST:
>               pipe_config->output_types |= BIT(INTEL_OUTPUT_DP_MST);
>               pipe_config->lane_count =
> -- 
> 2.30.2

-- 
Ville Syrjälä
Intel

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