Check for Overflow bits for layer3 in the irq handler.

Fixes: 7f7b96a8a0a1 ("drm/kmb: Add support for KeemBay Display")
Signed-off-by: Anitha Chrisanthus <anitha.chrisant...@intel.com>
---
 drivers/gpu/drm/kmb/kmb_drv.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/kmb/kmb_drv.c b/drivers/gpu/drm/kmb/kmb_drv.c
index f54392ec4fab..bb7eca9e13ae 100644
--- a/drivers/gpu/drm/kmb/kmb_drv.c
+++ b/drivers/gpu/drm/kmb/kmb_drv.c
@@ -381,7 +381,7 @@ static irqreturn_t handle_lcd_irq(struct drm_device *dev)
                if (val & LAYER3_DMA_FIFO_UNDERFLOW)
                        drm_dbg(&kmb->drm,
                                "LAYER3:GL1 DMA UNDERFLOW val = 0x%lx", val);
-               if (val & LAYER3_DMA_FIFO_UNDERFLOW)
+               if (val & LAYER3_DMA_FIFO_OVERFLOW)
                        drm_dbg(&kmb->drm,
                                "LAYER3:GL1 DMA OVERFLOW val = 0x%lx", val);
        }
-- 
2.25.1

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