On Wed, Jul 07, 2021 at 11:13:24AM -0700, Lucas De Marchi wrote:
> Commit 161058fb899e ("drm/i915: Add remaining conversions to GRAPHICS_VER")
> did the last conversions to the new macros for version checks, but some
> some changes sneaked in to use INTEL_GEN. Remove the last users so
> we can remove the macros.
>
> Signed-off-by: Lucas De Marchi <lucas.demar...@intel.com>
Reviewed-by: Matt Roper <matthew.d.ro...@intel.com>
I think the third change here is just one we somehow missed during the
previous conversion rather than a new use, right?
> ---
> drivers/gpu/drm/i915/display/intel_display_debugfs.c | 3 ++-
> drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
> drivers/gpu/drm/i915/intel_uncore.c | 2 +-
> 3 files changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> index af9e58619667..d5af5708c9da 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> @@ -544,7 +544,8 @@ static int i915_dmc_info(struct seq_file *m, void *unused)
>
> seq_printf(m, "fw loaded: %s\n",
> yesno(intel_dmc_has_payload(dev_priv)));
> seq_printf(m, "path: %s\n", dmc->fw_path);
> - seq_printf(m, "Pipe A fw support: %s\n", yesno(INTEL_GEN(dev_priv) >=
> 12));
> + seq_printf(m, "Pipe A fw support: %s\n",
> + yesno(GRAPHICS_VER(dev_priv) >= 12));
> seq_printf(m, "Pipe A fw loaded: %s\n",
> yesno(dmc->dmc_info[DMC_FW_PIPEA].payload));
> seq_printf(m, "Pipe B fw support: %s\n",
> yesno(IS_ALDERLAKE_P(dev_priv)));
> seq_printf(m, "Pipe B fw loaded: %s\n",
> yesno(dmc->dmc_info[DMC_FW_PIPEB].payload));
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
> b/drivers/gpu/drm/i915/i915_debugfs.c
> index cc745751ac53..0529576f069c 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -636,7 +636,7 @@ static int i915_swizzle_info(struct seq_file *m, void
> *data)
> intel_uncore_read16(uncore, C0DRB3_BW));
> seq_printf(m, "C1DRB3 = 0x%04x\n",
> intel_uncore_read16(uncore, C1DRB3_BW));
> - } else if (INTEL_GEN(dev_priv) >= 6) {
> + } else if (GRAPHICS_VER(dev_priv) >= 6) {
> seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n",
> intel_uncore_read(uncore, MAD_DIMM_C0));
> seq_printf(m, "MAD_DIMM_C1 = 0x%08x\n",
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c
> b/drivers/gpu/drm/i915/intel_uncore.c
> index d067524f9162..ee1c6fbc3d97 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -1929,7 +1929,7 @@ int intel_uncore_init_mmio(struct intel_uncore *uncore)
> return -ENODEV;
> }
>
> - if (INTEL_GEN(i915) > 5 && !intel_vgpu_active(i915))
> + if (GRAPHICS_VER(i915) > 5 && !intel_vgpu_active(i915))
> uncore->flags |= UNCORE_HAS_FORCEWAKE;
>
> if (!intel_uncore_has_forcewake(uncore)) {
> --
> 2.31.1
>
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
