Enable support for Logarithmic gamma readout for XE_LPD.
Signed-off-by: Uma Shankar <uma.shan...@intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 72 ++++++++++++++++++++++
drivers/gpu/drm/i915/i915_reg.h | 6 ++
2 files changed, 78 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c
b/drivers/gpu/drm/i915/display/intel_color.c
index a8b771f22880..1238fe05b358 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -486,6 +486,17 @@ static void icl_lut_multi_seg_pack(struct drm_color_lut
*entry, u32 ldw, u32 udw
REG_FIELD_GET(PAL_PREC_MULTI_SEG_BLUE_LDW_MASK, ldw);
}
+static void d13_lut_logarithmic_pack(struct drm_color_lut *entry,
+ u32 ldw, u32 udw)
+{
+ entry->red = REG_FIELD_GET(PAL_PREC_LOGARITHMIC_RED_UDW_MASK, udw) << 6
|
+
REG_FIELD_GET(PAL_PREC_LOGARITHMIC_RED_LDW_MASK, ldw);
+ entry->green = REG_FIELD_GET(PAL_PREC_LOGARITHMIC_GREEN_UDW_MASK, udw)
<< 6 |
+
REG_FIELD_GET(PAL_PREC_LOGARITHMIC_GREEN_LDW_MASK, ldw);
+ entry->blue = REG_FIELD_GET(PAL_PREC_LOGARITHMIC_BLUE_UDW_MASK, udw) <<
6 |
+
REG_FIELD_GET(PAL_PREC_LOGARITHMIC_BLUE_LDW_MASK, ldw);
+}
+
static void i9xx_color_commit(const struct intel_crtc_state *crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
@@ -2434,6 +2445,66 @@ static void d13_load_luts(const struct intel_crtc_state
*crtc_state)
intel_dsb_commit(crtc_state);
}
+static struct drm_property_blob *
+d13_read_lut_logarithmic(struct intel_crtc *crtc)
+{
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ int i, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
+ enum pipe pipe = crtc->pipe;
+ struct drm_property_blob *blob;
+ struct drm_color_lut *lut;
+ u32 gamma_max_val = 0xFFFF;
+
+ blob = drm_property_create_blob(&dev_priv->drm,
+ sizeof(struct drm_color_lut) * lut_size,
+ NULL);
+ if (IS_ERR(blob))
+ return NULL;
+
+ lut = blob->data;
+
+ intel_de_write(dev_priv, PREC_PAL_INDEX(pipe),
+ PAL_PREC_AUTO_INCREMENT);
+
+ for (i = 0; i < lut_size - 3; i++) {
+ u32 ldw = intel_de_read(dev_priv, PREC_PAL_DATA(pipe));
+ u32 udw = intel_de_read(dev_priv, PREC_PAL_DATA(pipe));
+
+ d13_lut_logarithmic_pack(&lut[i], ldw, udw);
+ }
+
+ /* All the extended ranges are now limited to last value of 1.0 */
+ while (i < lut_size) {
+ lut[i].red = gamma_max_val;
+ lut[i].green = gamma_max_val;
+ lut[i].blue = gamma_max_val;
+ i++;
+ };
+
+ intel_de_write(dev_priv, PREC_PAL_INDEX(pipe), 0);
+
+ return blob;
+}
+
+static void d13_read_luts(struct intel_crtc_state *crtc_state)
+{
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+
+ if ((crtc_state->gamma_mode & POST_CSC_GAMMA_ENABLE) == 0)
+ return;
+
+ switch (crtc_state->gamma_mode & GAMMA_MODE_MODE_MASK) {
+ case GAMMA_MODE_MODE_8BIT:
+ crtc_state->hw.gamma_lut = ilk_read_lut_8(crtc);
+ break;
+ case GAMMA_MODE_MODE_12BIT_LOGARITHMIC:
+ crtc_state->hw.gamma_lut = d13_read_lut_logarithmic(crtc);
+ break;
+ default:
+ crtc_state->hw.gamma_lut = bdw_read_lut_10(crtc,
PAL_PREC_INDEX_VALUE(0));
+ }
+}
+
void intel_color_init(struct intel_crtc *crtc)
{
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
@@ -2488,6 +2559,7 @@ void intel_color_init(struct intel_crtc *crtc)
if (DISPLAY_VER(dev_priv) >= 13) {
dev_priv->display.load_luts = d13_load_luts;
+ dev_priv->display.read_luts = d13_read_luts;
} else if (DISPLAY_VER(dev_priv) >= 11) {
dev_priv->display.load_luts = icl_load_luts;
dev_priv->display.read_luts = icl_read_luts;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 957f97edf035..dc10b5e2ff3c 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7750,6 +7750,12 @@ enum {
#define GAMMA_MODE_MODE_SPLIT (3 << 0) /* ivb-bdw */
#define GAMMA_MODE_MODE_12BIT_MULTI_SEGMENTED (3 << 0) /* icl + */
#define GAMMA_MODE_MODE_12BIT_LOGARITHMIC (3 << 0) /* D13+ + */
+#define PAL_PREC_LOGARITHMIC_RED_LDW_MASK REG_GENMASK(29, 24)
+#define PAL_PREC_LOGARITHMIC_RED_UDW_MASK REG_GENMASK(29, 20)
+#define PAL_PREC_LOGARITHMIC_GREEN_LDW_MASK REG_GENMASK(19, 14)
+#define PAL_PREC_LOGARITHMIC_GREEN_UDW_MASK REG_GENMASK(19, 10)
+#define PAL_PREC_LOGARITHMIC_BLUE_LDW_MASK REG_GENMASK(9, 4)
+#define PAL_PREC_LOGARITHMIC_BLUE_UDW_MASK REG_GENMASK(9, 0)
/* DMC */
#define DMC_PROGRAM(i) _MMIO(0x80000 + (i) * 4)
--
2.26.2
