From: Yongqiang Niu <yongqiang....@mediatek.com>
Enable dither function to improve the display quality for dither
supported bpc 4, 6, 8. For not supported bpc, use relay mode.
Signed-off-by: Yongqiang Niu <yongqiang....@mediatek.com>
Signed-off-by: Hsin-Yi Wang <hsi...@chromium.org>
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 15 ++++++++++++---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
index ac2cb25620357..5761dd15eedf2 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
@@ -53,6 +53,7 @@
#define DITHER_EN BIT(0)
#define DISP_DITHER_CFG 0x0020
#define DITHER_RELAY_MODE BIT(0)
+#define DITHER_ENGINE_EN BIT(1)
#define DISP_DITHER_SIZE 0x0030
#define LUT_10BIT_MASK 0x03ff
@@ -314,9 +315,17 @@ static void mtk_dither_config(struct device *dev, unsigned
int w,
unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
{
struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
-
- mtk_ddp_write(cmdq_pkt, h << 16 | w, &priv->cmdq_reg, priv->regs,
DISP_DITHER_SIZE);
- mtk_ddp_write(cmdq_pkt, DITHER_RELAY_MODE, &priv->cmdq_reg, priv->regs,
DISP_DITHER_CFG);
+ bool valid_bpc = (bpc == 4 || bpc == 6 || bpc == 8);
+
+ mtk_ddp_write(cmdq_pkt, h << 16 | w, &priv->cmdq_reg, priv->regs,
+ DISP_DITHER_SIZE);
+ if (valid_bpc)
+ mtk_dither_set_common(priv->regs, &priv->cmdq_reg, bpc,
+ DISP_DITHER_CFG, DITHER_ENGINE_EN,
+ cmdq_pkt);
+ else
+ mtk_ddp_write(cmdq_pkt, DITHER_RELAY_MODE, &priv->cmdq_reg,
+ priv->regs, DISP_DITHER_CFG);
}
static void mtk_dither_start(struct device *dev)
--
2.30.0.365.g02bc693789-goog
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