On Tue, Jun 2, 2020 at 4:38 PM Ruhl, Michael J <michael.j.r...@intel.com> wrote: > >-----Original Message----- > >From: dri-devel <dri-devel-boun...@lists.freedesktop.org> On Behalf Of > >Piotr Stankiewicz > >Sent: Tuesday, June 2, 2020 5:21 AM > >To: Alex Deucher <alexander.deuc...@amd.com>; Christian König > ><christian.koe...@amd.com>; David Zhou <david1.z...@amd.com>; David > >Airlie <airl...@linux.ie>; Daniel Vetter <dan...@ffwll.ch> > >Cc: Stankiewicz, Piotr <piotr.stankiew...@intel.com>; dri- > >de...@lists.freedesktop.org; amd-...@lists.freedesktop.org; linux- > >ker...@vger.kernel.org > >Subject: [PATCH 07/15] drm/amdgpu: use PCI_IRQ_MSI_TYPES where > >appropriate
... > > int nvec = pci_msix_vec_count(adev->pdev); > > unsigned int flags; > > > >- if (nvec <= 0) { > >+ if (nvec > 0) > >+ flags = PCI_IRQ_MSI_TYPES; > >+ else > > flags = PCI_IRQ_MSI; > >- } else { > >- flags = PCI_IRQ_MSI | PCI_IRQ_MSIX; > >- } > > Minor nit: > > Is it really necessary to set do this check? Can flags just > be set? > > I.e.: > flags = PCI_IRQ_MSI_TYPES; > > pci_alloc_irq_vector() tries stuff in order. If MSIX is not available, > it will try MSI. That's also what I proposed earlier. But I suggested as well to wait for AMD people to confirm that neither pci_msix_vec_count() nor flags is needed and we can directly supply MSI_TYPES to the below call. > > /* we only need one vector */ > > nvec = pci_alloc_irq_vectors(adev->pdev, 1, 1, flags); -- With Best Regards, Andy Shevchenko _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel