[PATCH v3 062/105] drm/vc4: crtc: Only access the PixelValve registers if we have to

[Maxime Ripard]

The CRTC hooks are called both for the TXP and the pixelvalve, yet some
will read / write the registers as if the device was a pixelvalve, which
won't really work.

Let's make sure we only access those registers if we are running on a
PixelValve.

Signed-off-by: Maxime Ripard <max...@cerno.tech>
---
 drivers/gpu/drm/vc4/vc4_crtc.c | 25 ++++++++++++++++++-------
 1 file changed, 18 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
index f82e3b0e11bd..ee4381c144a5 100644
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
@@ -405,16 +405,19 @@ static void require_hvs_enabled(struct drm_device *dev)
 
 static int vc4_crtc_disable(struct drm_crtc *crtc, unsigned int channel)
 {
+       struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state);
        struct drm_encoder *encoder = vc4_get_crtc_encoder(crtc);
        struct vc4_encoder *vc4_encoder = to_vc4_encoder(encoder);
        struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
        struct drm_device *dev = crtc->dev;
        int ret;
 
-       CRTC_WRITE(PV_V_CONTROL,
-                  CRTC_READ(PV_V_CONTROL) & ~PV_VCONTROL_VIDEN);
-       ret = wait_for(!(CRTC_READ(PV_V_CONTROL) & PV_VCONTROL_VIDEN), 1);
-       WARN_ONCE(ret, "Timeout waiting for !PV_VCONTROL_VIDEN\n");
+       if (!vc4_state->feed_txp) {
+               CRTC_WRITE(PV_V_CONTROL,
+                          CRTC_READ(PV_V_CONTROL) & ~PV_VCONTROL_VIDEN);
+               ret = wait_for(!(CRTC_READ(PV_V_CONTROL) & PV_VCONTROL_VIDEN), 
1);
+               WARN_ONCE(ret, "Timeout waiting for !PV_VCONTROL_VIDEN\n");
+       }
 
        mdelay(20);
 
@@ -508,10 +511,10 @@ static void vc4_crtc_atomic_enable(struct drm_crtc *crtc,
        if (vc4_encoder->pre_crtc_configure)
                vc4_encoder->pre_crtc_configure(encoder);
 
-       if (!vc4_state->feed_txp)
+       if (!vc4_state->feed_txp) {
                vc4_crtc_config_pv(crtc);
-
-       CRTC_WRITE(PV_CONTROL, CRTC_READ(PV_CONTROL) | PV_CONTROL_EN);
+               CRTC_WRITE(PV_CONTROL, CRTC_READ(PV_CONTROL) | PV_CONTROL_EN);
+       }
 
        if (vc4_encoder->pre_crtc_enable)
                vc4_encoder->pre_crtc_enable(encoder);
@@ -611,6 +614,10 @@ static int vc4_crtc_atomic_check(struct drm_crtc *crtc,
 static int vc4_enable_vblank(struct drm_crtc *crtc)
 {
        struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
+       struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state);
+
+       if (vc4_state->feed_txp)
+               return 0;
 
        CRTC_WRITE(PV_INTEN, PV_INT_VFP_START);
 
@@ -620,6 +627,10 @@ static int vc4_enable_vblank(struct drm_crtc *crtc)
 static void vc4_disable_vblank(struct drm_crtc *crtc)
 {
        struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
+       struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state);
+
+       if (vc4_state->feed_txp)
+               return;
 
        CRTC_WRITE(PV_INTEN, 0);
 }
-- 
git-series 0.9.1
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