Fix the following gcc warning:

drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/vega10_powertune.c:710:46:
warning: ‘PSMGCEDCThresholdConfig_vega10’ defined but not used
[-Wunused-const-variable=]
 static const struct vega10_didt_config_reg
PSMGCEDCThresholdConfig_vega10[] =
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/vega10_powertune.c:654:46:
warning: ‘PSMSEEDCThresholdConfig_Vega10’ defined but not used
[-Wunused-const-variable=]
 static const struct vega10_didt_config_reg
PSMSEEDCThresholdConfig_Vega10[] =
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Reported-by: Hulk Robot <hul...@huawei.com>
Signed-off-by: Jason Yan <yanai...@huawei.com>
---
 .../amd/powerplay/hwmgr/vega10_powertune.c    | 23 -------------------
 1 file changed, 23 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c 
b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c
index ca9b23b5abc9..9757d47dd6b8 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c
@@ -651,18 +651,6 @@ static const struct vega10_didt_config_reg   
PSMSEEDCStallDelayConfig_Vega10[] =
        {   0xFFFFFFFF  }  /* End of list */
 };
 
-static const struct vega10_didt_config_reg   PSMSEEDCThresholdConfig_Vega10[] =
-{
-/* 
---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
- *      Offset                             Mask                                
                 Shift                                                  Value
- * 
---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
- */
-       /* SQ EDC THRESHOLD */
-       {   ixDIDT_SQ_EDC_THRESHOLD,           
DIDT_SQ_EDC_THRESHOLD__EDC_THRESHOLD_MASK,           
DIDT_SQ_EDC_THRESHOLD__EDC_THRESHOLD__SHIFT,            0x0000 },
-
-       {   0xFFFFFFFF  }  /* End of list */
-};
-
 static const struct vega10_didt_config_reg   PSMSEEDCCtrlResetConfig_Vega10[] =
 {
 /* 
---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
@@ -707,17 +695,6 @@ static const struct vega10_didt_config_reg   
PSMSEEDCCtrlConfig_Vega10[] =
        {   0xFFFFFFFF  }  /* End of list */
 };
 
-static const struct vega10_didt_config_reg   PSMGCEDCThresholdConfig_vega10[] =
-{
-/* 
---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
- *      Offset                             Mask                                
                 Shift                                                  Value
- * 
---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
- */
-       {   mmGC_EDC_THRESHOLD,                
GC_EDC_THRESHOLD__EDC_THRESHOLD_MASK,                
GC_EDC_THRESHOLD__EDC_THRESHOLD__SHIFT,                 0x0000000 },
-
-       {   0xFFFFFFFF  }  /* End of list */
-};
-
 static const struct vega10_didt_config_reg   PSMGCEDCDroopCtrlConfig_vega10[] =
 {
 /* 
---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
-- 
2.21.1

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