Hi Jassi,
On Thu, 2020-03-19 at 20:05 -0500, Jassi Brar wrote: > On Sun, Mar 8, 2020 at 5:53 AM Dennis YC Hsieh > <dennis-yc.hs...@mediatek.com> wrote: > > > > Some gce hardware shift pc and end address in register to support > > large dram addressing. > > Implement gce address shift when write or read pc and end register. > > And add shift bit in platform definition. > > > > Signed-off-by: Dennis YC Hsieh <dennis-yc.hs...@mediatek.com> > > Reviewed-by: CK Hu <ck...@mediatek.com> > > --- > > drivers/mailbox/mtk-cmdq-mailbox.c | 61 ++++++++++++++++++------ > > drivers/soc/mediatek/mtk-cmdq-helper.c | 3 +- > > include/linux/mailbox/mtk-cmdq-mailbox.h | 2 + > > > Please segregate this patch, and any other if, into mailbox and > platform specific patchsets. Ideally soc/client specific changes later > on top of mailbox/provider changes. > > Thanks Thanks for your comment. I'll separate mailbox and soc code. Regards, Dennis _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
