Hi "Guido,

I love your patch! Perhaps something to improve:

[auto build test WARNING on linus/master]
[cannot apply to v5.3 next-20190920]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]

url:    
https://github.com/0day-ci/linux/commits/Guido-G-nther/drm-bridge-Add-NWL-MIPI-DSI-host-controller-support/20190923-005010

If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <l...@intel.com>

smatch warnings:
drivers/gpu/drm/bridge/nwl-dsi.c:272 nwl_dsi_config_dpi() warn: unsigned 
'color_format' is never less than zero.

vim +/color_format +272 drivers/gpu/drm/bridge/nwl-dsi.c

   245  
   246  static int nwl_dsi_config_dpi(struct nwl_dsi *dsi)
   247  {
   248          u32 color_format, mode;
   249          bool burst_mode;
   250          int hfront_porch, hback_porch, vfront_porch, vback_porch;
   251          int hsync_len, vsync_len;
   252  
   253          hfront_porch = dsi->mode.hsync_start - dsi->mode.hdisplay;
   254          hsync_len = dsi->mode.hsync_end - dsi->mode.hsync_start;
   255          hback_porch = dsi->mode.htotal - dsi->mode.hsync_end;
   256  
   257          vfront_porch = dsi->mode.vsync_start - dsi->mode.vdisplay;
   258          vsync_len = dsi->mode.vsync_end - dsi->mode.vsync_start;
   259          vback_porch = dsi->mode.vtotal - dsi->mode.vsync_end;
   260  
   261          DRM_DEV_DEBUG_DRIVER(dsi->dev, "hfront_porch = %d\n", 
hfront_porch);
   262          DRM_DEV_DEBUG_DRIVER(dsi->dev, "hback_porch = %d\n", 
hback_porch);
   263          DRM_DEV_DEBUG_DRIVER(dsi->dev, "hsync_len = %d\n", hsync_len);
   264          DRM_DEV_DEBUG_DRIVER(dsi->dev, "hdisplay = %d\n", 
dsi->mode.hdisplay);
   265          DRM_DEV_DEBUG_DRIVER(dsi->dev, "vfront_porch = %d\n", 
vfront_porch);
   266          DRM_DEV_DEBUG_DRIVER(dsi->dev, "vback_porch = %d\n", 
vback_porch);
   267          DRM_DEV_DEBUG_DRIVER(dsi->dev, "vsync_len = %d\n", vsync_len);
   268          DRM_DEV_DEBUG_DRIVER(dsi->dev, "vactive = %d\n", 
dsi->mode.vdisplay);
   269          DRM_DEV_DEBUG_DRIVER(dsi->dev, "clock = %d kHz\n", 
dsi->mode.clock);
   270  
   271          color_format = nwl_dsi_get_dpi_pixel_format(dsi->format);
 > 272          if (color_format < 0) {
   273                  DRM_DEV_ERROR(dsi->dev, "Invalid color format 0x%x\n",
   274                                dsi->format);
   275                  return color_format;
   276          }
   277          DRM_DEV_DEBUG_DRIVER(dsi->dev, "pixel fmt = %d\n", dsi->format);
   278  
   279          nwl_dsi_write(dsi, NWL_DSI_INTERFACE_COLOR_CODING, 
NWL_DSI_DPI_24_BIT);
   280          nwl_dsi_write(dsi, NWL_DSI_PIXEL_FORMAT, color_format);
   281          /*
   282           * Adjusting input polarity based on the video mode results in
   283           * a black screen so always pick active low:
   284           */
   285          nwl_dsi_write(dsi, NWL_DSI_VSYNC_POLARITY,
   286                        NWL_DSI_VSYNC_POLARITY_ACTIVE_LOW);
   287          nwl_dsi_write(dsi, NWL_DSI_HSYNC_POLARITY,
   288                        NWL_DSI_HSYNC_POLARITY_ACTIVE_LOW);
   289  
   290          burst_mode = (dsi->dsi_mode_flags & MIPI_DSI_MODE_VIDEO_BURST) 
&&
   291                       !(dsi->dsi_mode_flags & 
MIPI_DSI_MODE_VIDEO_SYNC_PULSE);
   292  
   293          if (burst_mode) {
   294                  nwl_dsi_write(dsi, NWL_DSI_VIDEO_MODE, 
NWL_DSI_VM_BURST_MODE);
   295                  nwl_dsi_write(dsi, NWL_DSI_PIXEL_FIFO_SEND_LEVEL, 256);
   296          } else {
   297                  mode = ((dsi->dsi_mode_flags & 
MIPI_DSI_MODE_VIDEO_SYNC_PULSE) ?
   298                                  NWL_DSI_VM_BURST_MODE_WITH_SYNC_PULSES :
   299                                  
NWL_DSI_VM_NON_BURST_MODE_WITH_SYNC_EVENTS);
   300                  nwl_dsi_write(dsi, NWL_DSI_VIDEO_MODE, mode);
   301                  nwl_dsi_write(dsi, NWL_DSI_PIXEL_FIFO_SEND_LEVEL,
   302                                dsi->mode.hdisplay);
   303          }
   304  
   305          nwl_dsi_write(dsi, NWL_DSI_HFP, hfront_porch);
   306          nwl_dsi_write(dsi, NWL_DSI_HBP, hback_porch);
   307          nwl_dsi_write(dsi, NWL_DSI_HSA, hsync_len);
   308  
   309          nwl_dsi_write(dsi, NWL_DSI_ENABLE_MULT_PKTS, 0x0);
   310          nwl_dsi_write(dsi, NWL_DSI_BLLP_MODE, 0x1);
   311          nwl_dsi_write(dsi, NWL_DSI_USE_NULL_PKT_BLLP, 0x0);
   312          nwl_dsi_write(dsi, NWL_DSI_VC, 0x0);
   313  
   314          nwl_dsi_write(dsi, NWL_DSI_PIXEL_PAYLOAD_SIZE, 
dsi->mode.hdisplay);
   315          nwl_dsi_write(dsi, NWL_DSI_VACTIVE, dsi->mode.vdisplay - 1);
   316          nwl_dsi_write(dsi, NWL_DSI_VBP, vback_porch);
   317          nwl_dsi_write(dsi, NWL_DSI_VFP, vfront_porch);
   318  
   319          return 0;
   320  }
   321  

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation
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