On Fri, 2019-08-09 at 14:04 +0200, Lucas Stach wrote: > If a MMU is shared between multiple GPUs, all of them need to flush their > TLBs, so a single marker that gets reset on the first flush won't do. > Replace the flush marker with a sequence number, so that it's possible to > check if the TLB is in sync with the current page table state for each GPU. > > Signed-off-by: Lucas Stach <l.st...@pengutronix.de>
Reviewed-by: Philipp Zabel <p.za...@pengutronix.de> regards Philipp _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
