On Tue, Jul 23, 2019 at 01:09:55PM -0700, Rob Clark wrote: > On Mon, Jul 22, 2019 at 9:09 PM John Stultz <john.stu...@linaro.org> wrote: > > > > On Thu, Jul 18, 2019 at 3:06 AM Christoph Hellwig <h...@infradead.org> > > wrote: > > > > > > Is there any exlusion between mmap / vmap and the device accessing > > > the data? Without that you are going to run into a lot of coherency > > > problems. > > dma_fence is basically the way to handle exclusion between different > device access (since device access tends to be asynchronous). For > device<->device access, each driver is expected to take care of any > cache(s) that the device might have. (Ie. device writing to buffer > should flush it's caches if needed before signalling fence to let > reading device know that it is safe to read, etc.) > > _begin/end_cpu_access() is intended to be the exclusion for CPU access > (which is synchronous)
What I mean is that we need a clear state machine (preferably including ownership tracking ala dma-debug) where a piece of memory has one owner at a time that can access it. Only the owner can access is at that time, and at any owner switch we need to flush/invalidate all relevant caches. And with memory that is vmaped and mapped to userspace that can get really complicated. The above sounds like you have some of that in place, but we'll really need clear rules to make sure we don't have holes in the scheme.
