On Tue, Apr 30, 2019 at 06:19:34AM +0000, Lowry Li (Arm Technology China) wrote:
> Updates the device-tree doc about how to enable SMMU by devicetree.
>
> Signed-off-by: Lowry Li (Arm Technology China) <lowry...@arm.com>
> ---
> Documentation/devicetree/bindings/display/arm,komeda.txt | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> --
> 1.9.1
>
> diff --git a/Documentation/devicetree/bindings/display/arm,komeda.txt
> b/Documentation/devicetree/bindings/display/arm,komeda.txt
> index 02b2265..b12c045 100644
> --- a/Documentation/devicetree/bindings/display/arm,komeda.txt
> +++ b/Documentation/devicetree/bindings/display/arm,komeda.txt
> @@ -11,6 +11,10 @@ Required properties:
> - "pclk": for the APB interface clock
> - #address-cells: Must be 1
> - #size-cells: Must be 0
> +- iommus: configure the stream id to IOMMU, Must be configured if want to
> + enable iommu in display. for how to configure this node please reference
> + devicetree/bindings/iommu/arm,smmu-v3.txt,
> + devicetree/bindings/iommu/iommu.txt
>
> Required properties for sub-node: pipeline@nq
> Each device contains one or two pipeline sub-nodes (at least one), each
> @@ -44,6 +48,9 @@ Example:
> interrupts = <0 168 4>;
> clocks = <&dpu_mclk>, <&dpu_aclk>;
> clock-names = "mclk", "pclk";
> + iommus = <&smmu 0>, <&smmu 1>, <&smmu 2>, <&smmu 3>,
> + <&smmu 4>, <&smmu 5>, <&smmu 6>, <&smmu 7>,
> + <&smmu 8>, <&smmu 9>;
>
> dp0_pipe0: pipeline@0 {
> clocks = <&fpgaosc2>, <&dpu_aclk>;
Looks good to me
James
--
Reviewed-by: James Qian Wang (Arm Technology China) <james.qian.w...@arm.com>
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