This is required to bring Mali450 gpu out of reset. Also
we now use CLK_OF_DECLARE_DRIVER to probe in both the
clock and reset drivers. The clock and reset parts have
been done as one atomic commit to avoid a bisection hole.

Signed-off-by: Peter Griffin <peter.grif...@linaro.org>
Cc: Stephen Boyd <sb...@kernel.org>
---
 arch/arm64/boot/dts/hisilicon/hi6220.dtsi |  1 +
 drivers/clk/hisilicon/clk-hi6220.c        |  3 +-
 drivers/reset/hisilicon/hi6220_reset.c    | 65 ++++++++++++++++++++++++++++++-
 3 files changed, 67 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi 
b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 2defc19..66a3746 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -260,6 +260,7 @@
                        compatible = "hisilicon,hi6220-aoctrl", "syscon";
                        reg = <0x0 0xf7800000 0x0 0x2000>;
                        #clock-cells = <1>;
+                       #reset-cells = <1>;
                };
 
                sys_ctrl: sys_ctrl@f7030000 {
diff --git a/drivers/clk/hisilicon/clk-hi6220.c 
b/drivers/clk/hisilicon/clk-hi6220.c
index a87809d..3dde9d3 100644
--- a/drivers/clk/hisilicon/clk-hi6220.c
+++ b/drivers/clk/hisilicon/clk-hi6220.c
@@ -89,8 +89,9 @@ static void __init hi6220_clk_ao_init(struct device_node *np)
        hisi_clk_register_gate_sep(hi6220_separated_gate_clks_ao,
                                ARRAY_SIZE(hi6220_separated_gate_clks_ao), 
clk_data_ao);
 }
-CLK_OF_DECLARE(hi6220_clk_ao, "hisilicon,hi6220-aoctrl", hi6220_clk_ao_init);
 
+/* reset driver also probes and uses these registers */
+CLK_OF_DECLARE_DRIVER(hi6220_clk_ao, "hisilicon,hi6220-aoctrl", 
hi6220_clk_ao_init);
 
 /* clocks in sysctrl */
 static const char *mmc0_mux0_p[] __initdata = { "pll_ddr_gate", "syspll", };
diff --git a/drivers/reset/hisilicon/hi6220_reset.c 
b/drivers/reset/hisilicon/hi6220_reset.c
index d5e5229..ccd5e0a 100644
--- a/drivers/reset/hisilicon/hi6220_reset.c
+++ b/drivers/reset/hisilicon/hi6220_reset.c
@@ -36,6 +36,7 @@
 enum hi6220_reset_ctrl_type {
        PERIPHERAL,
        MEDIA,
+       AO,
 };
 
 struct hi6220_reset_data {
@@ -95,6 +96,61 @@ static const struct reset_control_ops hi6220_media_reset_ops 
= {
        .deassert = hi6220_media_deassert,
 };
 
+#define AO_SCTRL_SC_PW_CLKEN0     0x800
+#define AO_SCTRL_SC_PW_CLKDIS0    0x804
+
+#define AO_SCTRL_SC_PW_RSTEN0     0x810
+#define AO_SCTRL_SC_PW_RSTDIS0    0x814
+
+#define AO_SCTRL_SC_PW_ISOEN0     0x820
+#define AO_SCTRL_SC_PW_ISODIS0    0x824
+#define AO_MAX_INDEX              12
+
+static int hi6220_ao_assert(struct reset_controller_dev *rc_dev,
+                              unsigned long idx)
+{
+       struct hi6220_reset_data *data = to_reset_data(rc_dev);
+       struct regmap *regmap = data->regmap;
+       int ret;
+
+       ret = regmap_write(regmap, AO_SCTRL_SC_PW_RSTEN0, BIT(idx));
+       if (ret)
+               return ret;
+
+       ret = regmap_write(regmap, AO_SCTRL_SC_PW_ISOEN0, BIT(idx));
+       if (ret)
+               return ret;
+
+       ret = regmap_write(regmap, AO_SCTRL_SC_PW_CLKDIS0, BIT(idx));
+       if (ret)
+               return ret;
+}
+
+static int hi6220_ao_deassert(struct reset_controller_dev *rc_dev,
+                                unsigned long idx)
+{
+       struct hi6220_reset_data *data = to_reset_data(rc_dev);
+       struct regmap *regmap = data->regmap;
+       int ret;
+
+       ret = regmap_write(regmap, AO_SCTRL_SC_PW_RSTDIS0, BIT(idx));
+       if (ret)
+               return ret;
+
+       ret = regmap_write(regmap, AO_SCTRL_SC_PW_ISODIS0, BIT(idx));
+       if (ret)
+               return ret;
+
+       ret = regmap_write(regmap, AO_SCTRL_SC_PW_CLKEN0, BIT(idx));
+       if (ret)
+               return ret;
+}
+
+static const struct reset_control_ops hi6220_ao_reset_ops = {
+       .assert = hi6220_ao_assert,
+       .deassert = hi6220_ao_deassert,
+};
+
 static int hi6220_reset_probe(struct platform_device *pdev)
 {
        struct device_node *np = pdev->dev.of_node;
@@ -120,9 +176,12 @@ static int hi6220_reset_probe(struct platform_device *pdev)
        if (type == MEDIA) {
                data->rc_dev.ops = &hi6220_media_reset_ops;
                data->rc_dev.nr_resets = MEDIA_MAX_INDEX;
-       } else {
+       } else if (type == PERIPHERAL) {
                data->rc_dev.ops = &hi6220_peripheral_reset_ops;
                data->rc_dev.nr_resets = PERIPH_MAX_INDEX;
+       } else {
+               data->rc_dev.ops = &hi6220_ao_reset_ops;
+               data->rc_dev.nr_resets = AO_MAX_INDEX;
        }
 
        return reset_controller_register(&data->rc_dev);
@@ -137,6 +196,10 @@ static const struct of_device_id hi6220_reset_match[] = {
                .compatible = "hisilicon,hi6220-mediactrl",
                .data = (void *)MEDIA,
        },
+       {
+               .compatible = "hisilicon,hi6220-aoctrl",
+               .data = (void *)AO,
+       },
        { /* sentinel */ },
 };
 MODULE_DEVICE_TABLE(of, hi6220_reset_match);
-- 
2.7.4

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