On 26.03.2019 11:31, Tomi Valkeinen wrote: > For some reason the driver has a msleep(100) after writing to > DP_PHY_CTRL. Toshiba's documentation doesn't suggest any delay is > needed, and I have not seen any issues with the sleep removed. > > Drop it, as msleep(100) is a rather big one. > > Signed-off-by: Tomi Valkeinen <tomi.valkei...@ti.com> Reviewed-by: Andrzej Hajda <a.ha...@samsung.com>
-- Regards Andrzej > --- > drivers/gpu/drm/bridge/tc358767.c | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/drivers/gpu/drm/bridge/tc358767.c > b/drivers/gpu/drm/bridge/tc358767.c > index f628575c9de9..2a6c0c0d47a6 100644 > --- a/drivers/gpu/drm/bridge/tc358767.c > +++ b/drivers/gpu/drm/bridge/tc358767.c > @@ -872,7 +872,6 @@ static int tc_main_link_enable(struct tc_data *tc) > if (tc->link.base.num_lanes == 2) > dp_phy_ctrl |= PHY_2LANE; > tc_write(DP_PHY_CTRL, dp_phy_ctrl); > - msleep(100); > > /* PLL setup */ > tc_write(DP0_PLLCTRL, PLLUPDATE | PLLEN); _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
