Selective updates have a default granularity requirements as stated
by eDP spec, so check if HW can match those requirements before
enable PSR2.
Cc: Dhinakaran Pandiyan <dhinakaran.pandi...@intel.com>
Cc: Rodrigo Vivi <rodrigo.v...@intel.com>
Signed-off-by: José Roberto de Souza <jose.so...@intel.com>
---
drivers/gpu/drm/i915/intel_psr.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index c4a8f476eea9..282ff1bc68a7 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -539,6 +539,18 @@ static bool intel_psr2_config_valid(struct intel_dp
*intel_dp,
return false;
}
+ /* HW will always send full lines in SU blocks, so X will
+ * always be 0 and we only need to check the width to validate
+ * horizontal granularity.
+ * About vertical granularity HW works by SU blocks starting
+ * at each 4 lines with height of 4 lines, what eDP states
+ * that sink should support.
+ */
+ if (crtc_hdisplay % 4) {
+ DRM_DEBUG_KMS("PSR2 not enabled, default SU granularity not
match\n");
+ return false;
+ }
+
return true;
}
--
2.19.2
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