[PATCH 8/8] arm64: dts: rockchip: Enable dmc and dfi nodes on gru.

[Enric Balletbo i Serra]

From: Lin Huang <h...@rock-chips.com>

Enable the DMC (Dynamic Memory Controller) and the DFI (DDR PHY Interface)
nodes on gru/kevin boards so we can support DDR DVFS.

Signed-off-by: Lin Huang <h...@rock-chips.com>
Signed-off-by: Enric Balletbo i Serra <enric.balle...@collabora.com>
---

Changes in v1: None

 arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi | 21 ++++++++++++++++++++
 arch/arm64/boot/dts/rockchip/rk3399.dtsi     |  2 +-
 2 files changed, 22 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
index 1da8f7c1501e..7a7dcca11497 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
@@ -295,6 +295,12 @@
        status = "okay";
 };
 
+&dmc_opp_table {
+       opp04 {
+               opp-suspend;
+       };
+};
+
 /*
  * Set some suspend operating points to avoid OVP in suspend
  *
@@ -374,6 +380,10 @@
                <200000000>;
 };
 
+&display_subsystem {
+       devfreq = <&dmc>;
+};
+
 &emmc_phy {
        status = "okay";
 };
@@ -495,6 +505,17 @@ ap_i2c_audio: &i2c8 {
        status = "okay";
 };
 
+&dfi {
+       status = "okay";
+};
+
+&dmc {
+       status = "okay";
+       center-supply = <&ppvar_centerlogic>;
+       upthreshold = <25>;
+       downdifferential = <15>;
+};
+
 &sdhci {
        /*
         * Signal integrity isn't great at 200 MHz and 150 MHz (DDR) gives the
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index e9d9aa7aa2ac..20b64ca638cb 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -128,7 +128,7 @@
                };
        };
 
-       display-subsystem {
+       display_subsystem: display-subsystem {
                compatible = "rockchip,display-subsystem";
                ports = <&vopl_out>, <&vopb_out>;
        };
-- 
2.18.0

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