tree:   git://people.freedesktop.org/~agd5f/linux.git amd-staging-drm-next
head:   d0987b4ee380e9d814052071c939b38a74a34ab1
commit: 999555e0e0e9580c61715c55b32e123fe0f4c925 [593/600] drm/amd/display: 
Initialize data structure for DalMpVisualConfirm.
reproduce:
        # apt-get install sparse
        git checkout 999555e0e0e9580c61715c55b32e123fe0f4c925
        make ARCH=x86_64 allmodconfig
        make C=1 CF=-D__CHECK_ENDIAN__
:::::: branch date: 19 hours ago
:::::: commit date: 21 hours ago

   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_hw_sequencer.c:63:6: 
sparse: symbol 'print_microsec' was not declared. Should it be static?
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_hw_sequencer.c:88:6: 
sparse: symbol 'dcn10_log_hubbub_state' was not declared. Should it be static?
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_hw_sequencer.c:230:6: 
sparse: symbol 'dcn10_log_hw_state' was not declared. Should it be static?
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_hw_sequencer.c:1828:6: 
sparse: symbol 'build_prescale_params' was not declared. Should it be static?
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_hw_sequencer.c:1869:42: 
>> sparse: missing braces around initializer

git remote add radeon-alex git://people.freedesktop.org/~agd5f/linux.git
git remote update radeon-alex
git checkout 999555e0e0e9580c61715c55b32e123fe0f4c925
vim +1869 drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_hw_sequencer.c

480bd0cf4 Yongqiang Sun      2017-11-08  1865  
3ad818578 Eric Bernstein     2018-05-16  1866  static void 
dcn10_update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx)
480bd0cf4 Yongqiang Sun      2017-11-08  1867  {
480bd0cf4 Yongqiang Sun      2017-11-08  1868   struct hubp *hubp = 
pipe_ctx->plane_res.hubp;
999555e0e Hugo Hu            2018-07-03 @1869   struct mpcc_blnd_cfg blnd_cfg = 
{0};
feb4a3cd8 Eric Bernstein     2017-11-06  1870   bool per_pixel_alpha = 
pipe_ctx->plane_state->per_pixel_alpha && pipe_ctx->bottom_pipe;
feb4a3cd8 Eric Bernstein     2017-11-06  1871   int mpcc_id;
feb4a3cd8 Eric Bernstein     2017-11-06  1872   struct mpcc *new_mpcc;
feb4a3cd8 Eric Bernstein     2017-11-06  1873   struct mpc *mpc = 
dc->res_pool->mpc;
feb4a3cd8 Eric Bernstein     2017-11-06  1874   struct mpc_tree 
*mpc_tree_params = &(pipe_ctx->stream_res.opp->mpc_tree_params);
480bd0cf4 Yongqiang Sun      2017-11-08  1875  
4173c0bdd Eric Yang          2018-03-14  1876  
4173c0bdd Eric Yang          2018-03-14  1877  
480bd0cf4 Yongqiang Sun      2017-11-08  1878   /* TODO: proper fix once fpga 
works */
70ccab604 Harry Wentland     2017-05-08  1879  
fb3466a45 Bhawanpreet Lakha  2017-08-01  1880   if 
(dc->debug.surface_visual_confirm)
cc408d726 Dmytro Laktyushkin 2017-07-21  1881           
dcn10_get_surface_visual_confirm_color(
feb4a3cd8 Eric Bernstein     2017-11-06  1882                           
pipe_ctx, &blnd_cfg.black_color);
f0558542a Dmytro Laktyushkin 2017-06-01  1883   else
cc408d726 Dmytro Laktyushkin 2017-07-21  1884           
color_space_to_black_color(
cc408d726 Dmytro Laktyushkin 2017-07-21  1885                   dc, 
pipe_ctx->stream->output_color_space,
feb4a3cd8 Eric Bernstein     2017-11-06  1886                   
&blnd_cfg.black_color);
feb4a3cd8 Eric Bernstein     2017-11-06  1887  
feb4a3cd8 Eric Bernstein     2017-11-06  1888   if (per_pixel_alpha)
feb4a3cd8 Eric Bernstein     2017-11-06  1889           blnd_cfg.alpha_mode = 
MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA;
feb4a3cd8 Eric Bernstein     2017-11-06  1890   else
feb4a3cd8 Eric Bernstein     2017-11-06  1891           blnd_cfg.alpha_mode = 
MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA;
feb4a3cd8 Eric Bernstein     2017-11-06  1892  
feb4a3cd8 Eric Bernstein     2017-11-06  1893   blnd_cfg.overlap_only = false;
feb4a3cd8 Eric Bernstein     2017-11-06  1894   blnd_cfg.global_alpha = 0xff;
feb4a3cd8 Eric Bernstein     2017-11-06  1895   blnd_cfg.global_gain = 0xff;
feb4a3cd8 Eric Bernstein     2017-11-06  1896  
ad3273469 Dmytro Laktyushkin 2017-06-05  1897   /* DCN1.0 has output CM before 
MPC which seems to screw with
ad3273469 Dmytro Laktyushkin 2017-06-05  1898    * pre-multiplied alpha.
ad3273469 Dmytro Laktyushkin 2017-06-05  1899    */
feb4a3cd8 Eric Bernstein     2017-11-06  1900   blnd_cfg.pre_multiplied_alpha = 
is_rgb_cspace(
4fa086b9b Leo (Sunpeng  Li   2017-07-25  1901)                  
pipe_ctx->stream->output_color_space)
ad3273469 Dmytro Laktyushkin 2017-06-05  1902                                   
&& per_pixel_alpha;
feb4a3cd8 Eric Bernstein     2017-11-06  1903  
4173c0bdd Eric Yang          2018-03-14  1904  
feb4a3cd8 Eric Bernstein     2017-11-06  1905   /*
feb4a3cd8 Eric Bernstein     2017-11-06  1906    * TODO: remove hack
feb4a3cd8 Eric Bernstein     2017-11-06  1907    * Note: currently there is a 
bug in init_hw such that
feb4a3cd8 Eric Bernstein     2017-11-06  1908    * on resume from hibernate, 
BIOS sets up MPCC0, and
feb4a3cd8 Eric Bernstein     2017-11-06  1909    * we do mpcc_remove but the 
mpcc cannot go to idle
feb4a3cd8 Eric Bernstein     2017-11-06  1910    * after remove. This cause us 
to pick mpcc1 here,
feb4a3cd8 Eric Bernstein     2017-11-06  1911    * which causes a pstate hang 
for yet unknown reason.
feb4a3cd8 Eric Bernstein     2017-11-06  1912    */
feb4a3cd8 Eric Bernstein     2017-11-06  1913   mpcc_id = hubp->inst;
feb4a3cd8 Eric Bernstein     2017-11-06  1914  
4173c0bdd Eric Yang          2018-03-14  1915   /* If there is no full update, 
don't need to touch MPC tree*/
4173c0bdd Eric Yang          2018-03-14  1916   if 
(!pipe_ctx->plane_state->update_flags.bits.full_update) {
4173c0bdd Eric Yang          2018-03-14  1917           
mpc->funcs->update_blending(mpc, &blnd_cfg, mpcc_id);
4173c0bdd Eric Yang          2018-03-14  1918           return;
4173c0bdd Eric Yang          2018-03-14  1919   }
4173c0bdd Eric Yang          2018-03-14  1920  
feb4a3cd8 Eric Bernstein     2017-11-06  1921   /* check if this MPCC is 
already being used */
feb4a3cd8 Eric Bernstein     2017-11-06  1922   new_mpcc = 
mpc->funcs->get_mpcc_for_dpp(mpc_tree_params, mpcc_id);
feb4a3cd8 Eric Bernstein     2017-11-06  1923   /* remove MPCC if being used */
feb4a3cd8 Eric Bernstein     2017-11-06  1924   if (new_mpcc != NULL)
feb4a3cd8 Eric Bernstein     2017-11-06  1925           
mpc->funcs->remove_mpcc(mpc, mpc_tree_params, new_mpcc);
49fac0b46 Eric Bernstein     2017-11-16  1926   else
feb4a3cd8 Eric Bernstein     2017-11-06  1927           if 
(dc->debug.sanity_checks)
feb4a3cd8 Eric Bernstein     2017-11-06  1928                   
mpc->funcs->assert_mpcc_idle_before_connect(
feb4a3cd8 Eric Bernstein     2017-11-06  1929                                   
dc->res_pool->mpc, mpcc_id);
feb4a3cd8 Eric Bernstein     2017-11-06  1930  
feb4a3cd8 Eric Bernstein     2017-11-06  1931   /* Call MPC to insert new plane 
*/
feb4a3cd8 Eric Bernstein     2017-11-06  1932   new_mpcc = 
mpc->funcs->insert_plane(dc->res_pool->mpc,
feb4a3cd8 Eric Bernstein     2017-11-06  1933                   mpc_tree_params,
feb4a3cd8 Eric Bernstein     2017-11-06  1934                   &blnd_cfg,
feb4a3cd8 Eric Bernstein     2017-11-06  1935                   NULL,
feb4a3cd8 Eric Bernstein     2017-11-06  1936                   NULL,
feb4a3cd8 Eric Bernstein     2017-11-06  1937                   hubp->inst,
feb4a3cd8 Eric Bernstein     2017-11-06  1938                   mpcc_id);
feb4a3cd8 Eric Bernstein     2017-11-06  1939  
feb4a3cd8 Eric Bernstein     2017-11-06  1940   ASSERT(new_mpcc != NULL);
feb4a3cd8 Eric Bernstein     2017-11-06  1941  
feb4a3cd8 Eric Bernstein     2017-11-06  1942   hubp->opp_id = 
pipe_ctx->stream_res.opp->inst;
feb4a3cd8 Eric Bernstein     2017-11-06  1943   hubp->mpcc_id = mpcc_id;
480bd0cf4 Yongqiang Sun      2017-11-08  1944  }
480bd0cf4 Yongqiang Sun      2017-11-08  1945  

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation
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