On Wed, Jun 13, 2018 at 4:00 AM, Jernej Skrabec <jernej.skra...@siol.net> wrote: > According to documentation and experience with other similar SoCs, video > PLLs don't work stable if their output frequency is set below 192 MHz. > > Because of that, set minimal rate to both R40 video PLLs to 192 MHz. > > Signed-off-by: Jernej Skrabec <jernej.skra...@siol.net>
Reviewed-by: Chen-Yu Tsai <w...@csie.org> _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
