On Thu, Feb 15, 2018 at 06:54:48PM +0100, Giulio Benetti wrote: > Differently from other Lcd signals, HSYNC and VSYNC signals > result inverted if their bits are cleared to 0. > > Invert their settings of IO_POL register. > > Signed-off-by: Giulio Benetti <giulio.bene...@micronovasrl.com>
Applied, thanks! Maxime -- Maxime Ripard, Bootlin (formerly Free Electrons) Embedded Linux and Kernel engineering http://bootlin.com
signature.asc
Description: PGP signature
_______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
