Hi,
This series is to add new drm formats needed by some Xilinx IPs.
Some formats have unique characteristics such as pixels not being
byte-aligned. For instance, some 10bit formats have 2bit padding
after every 3-10bit components:
32b[0]: 10b comp0 - 10b comp1 - 10b comp2 - 2b padding
32b[1]: 10b comp3 - 10b comp4 - 10b comp5 - 2b padding
...
To model this, additional information is added to struct drm_format_info.
The patch has been tested with downstream drivers as well as the downstream
user space component (ex, modified modetest).
Thanks,
hyun
Jeffrey Mouroux (2):
uapi: drm: New fourcc codes needed by Xilinx Video IP
drm: fourcc: Update DRM Framework with new fourcc codes
Satish Kumar Nagireddy (1):
drm: drm_fourcc: Add scaling and padding factor to drm_format_info
drivers/gpu/drm/drm_fourcc.c | 143 ++++++++++++++++++++++--------------------
include/drm/drm_fourcc.h | 9 +++
include/uapi/drm/drm_fourcc.h | 9 +++
3 files changed, 93 insertions(+), 68 deletions(-)
--
2.7.4
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