Stefan Schake <stsch...@gmail.com> writes: > On Tue, Nov 14, 2017 at 1:18 AM, Eric Anholt <e...@anholt.net> wrote: >> Stefan Schake <stsch...@gmail.com> writes: >> >>> The overflow mem work callback vc4_overflow_mem_work reenables its >>> associated interrupt upon completion. To ensure all interrupts are disabled >>> when we return from vc4_irq_uninstall, we need to disable it again if >>> cancel_work_sync indicated pending work. >> >> Is there a reason we need the interrupts disabled at the V3D level while >> we have the IRQ disabled at the irqchip level? Once we re-enable at the >> irqchip, we immediately V3D_WRITE(V3D_INTENA, V3D_DRIVER_IRQS) anyway. > > irqchip will mask it in the ARM interrupt controller, so we will certainly > never > see an interrupt. I'm not sure on the exact guarantees V3D_INTENA and > V3D_INTCTL make - does the state in INTENA affect if V3D will signal an > interrupt in INTCTL? We're not currently clearing the latter in postinstall.
INTENA/INTDIS writes update the state of the single register that controls which bits of INTCTL get ORed together to raise the interrupt outside the V3D block.
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