drm_gem_cma_prime_import_sg_table() will fail if the number of entries
in the sg_table > 1. However, you can have a device that uses an IOMMU
engine and can map a discontiguous buffer with multiple entries that
have consecutive sg_dma_addresses, effectively making it contiguous.
Allow for that scenario by testing the entries in the sg_table for
contiguous coverage.
Reviewed-by: Brian Starkey <brian.star...@arm.com>
Signed-off-by: Liviu Dudau <liviu.du...@arm.com>
---
Hi,
This patch is the only change I need in order to be able to use existing
IOMMU domain infrastructure with the Mali DP driver. I have tested the
patch and I know it works correctly for my setup, but I would like to get
some comments on whether I am on the right path or if CMA really wants to
see an sg_table with only one entry.
Best regards,
Liviu
drivers/gpu/drm/drm_gem_cma_helper.c | 22 ++++++++++++++++++++--
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/drm_gem_cma_helper.c
b/drivers/gpu/drm/drm_gem_cma_helper.c
index 020e7668dfaba..43b179212052d 100644
--- a/drivers/gpu/drm/drm_gem_cma_helper.c
+++ b/drivers/gpu/drm/drm_gem_cma_helper.c
@@ -482,8 +482,26 @@ drm_gem_cma_prime_import_sg_table(struct drm_device *dev,
{
struct drm_gem_cma_object *cma_obj;
- if (sgt->nents != 1)
- return ERR_PTR(-EINVAL);
+ if (sgt->nents != 1) {
+ /* check if the entries in the sg_table are contiguous */
+ dma_addr_t next_addr = sg_dma_address(sgt->sgl);
+ struct scatterlist *s;
+ unsigned int i;
+
+ for_each_sg(sgt->sgl, s, sgt->nents, i) {
+ /*
+ * sg_dma_address(s) is only valid for entries
+ * that have sg_dma_len(s) != 0
+ */
+ if (!sg_dma_len(s))
+ continue;
+
+ if (sg_dma_address(s) != next_addr)
+ return ERR_PTR(-EINVAL);
+
+ next_addr = sg_dma_address(s) + sg_dma_len(s);
+ }
+ }
/* Create a CMA GEM buffer. */
cma_obj = __drm_gem_cma_create(dev, attach->dmabuf->size);
--
2.14.3
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