Cc: Lionel Landwerlin <lionel.g.landwer...@intel.com>
Signed-off-by: Sourab Gupta <sourab.gu...@intel.com>
Signed-off-by: Sagar Arun Kamble <sagar.a.kam...@intel.com>
---
 include/drm/i915_drm.h | 87 ++++++++++++++++++++++++++++++++++++++++++++++----
 1 file changed, 80 insertions(+), 7 deletions(-)

diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index 5ebe046..d70f75f 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -897,6 +897,11 @@ struct drm_i915_gem_execbuffer2 {
 #define i915_execbuffer2_get_context_id(eb2) \
        ((eb2).rsvd1 & I915_EXEC_CONTEXT_ID_MASK)
 
+/* upper 32 bits of rsvd1 field contain tag */
+#define I915_EXEC_TAG_MASK             (0xffffffff00000000UL)
+#define i915_execbuffer2_get_tag(eb2) \
+       ((eb2).rsvd1 & I915_EXEC_TAG_MASK >> 32)
+
 struct drm_i915_gem_pin {
        /** Handle of the buffer to be pinned. */
        __u32 handle;
@@ -1293,17 +1298,34 @@ struct drm_i915_gem_context_param {
 };
 
 enum drm_i915_oa_format {
-       I915_OA_FORMAT_A13 = 1,
-       I915_OA_FORMAT_A29,
-       I915_OA_FORMAT_A13_B8_C8,
-       I915_OA_FORMAT_B4_C8,
-       I915_OA_FORMAT_A45_B8_C8,
-       I915_OA_FORMAT_B4_C8_A16,
-       I915_OA_FORMAT_C4_B8,
+       I915_OA_FORMAT_A13 = 1,     /* HSW only */
+       I915_OA_FORMAT_A29,         /* HSW only */
+       I915_OA_FORMAT_A13_B8_C8,   /* HSW only */
+       I915_OA_FORMAT_B4_C8,       /* HSW only */
+       I915_OA_FORMAT_A45_B8_C8,   /* HSW only */
+       I915_OA_FORMAT_B4_C8_A16,   /* HSW only */
+       I915_OA_FORMAT_C4_B8,       /* HSW+ */
+
+       /* Gen8+ */
+       I915_OA_FORMAT_A12,
+       I915_OA_FORMAT_A12_B8_C8,
+       I915_OA_FORMAT_A32u40_A4u32_B8_C8,
 
        I915_OA_FORMAT_MAX          /* non-ABI */
 };
 
+enum drm_i915_perf_sample_oa_source {
+       I915_PERF_SAMPLE_OA_SOURCE_OABUFFER,
+       I915_PERF_SAMPLE_OA_SOURCE_RCS,
+       I915_PERF_SAMPLE_OA_SOURCE_MAX  /* non-ABI */
+};
+
+#define I915_PERF_MMIO_NUM_MAX 8
+struct drm_i915_perf_mmio_list {
+       __u32 num_mmio;
+       __u32 mmio_list[I915_PERF_MMIO_NUM_MAX];
+};
+
 enum drm_i915_perf_property_id {
        /**
         * Open the stream for a specific context handle (as used with
@@ -1338,6 +1360,51 @@ enum drm_i915_perf_property_id {
         */
        DRM_I915_PERF_PROP_OA_EXPONENT,
 
+       /**
+        * The value of this property set to 1 requests inclusion of sample
+        * source field to be given to userspace. The sample source field
+        * specifies the origin of OA report.
+        */
+       DRM_I915_PERF_PROP_SAMPLE_OA_SOURCE,
+
+       /**
+        * The value of this property specifies the GPU engine for which
+        * the samples need to be collected. Specifying this property also
+        * implies the command stream based sample collection.
+        */
+       DRM_I915_PERF_PROP_ENGINE,
+
+       /**
+        * The value of this property set to 1 requests inclusion of context ID
+        * in the perf sample data.
+        */
+       DRM_I915_PERF_PROP_SAMPLE_CTX_ID,
+
+       /**
+        * The value of this property set to 1 requests inclusion of pid in the
+        * perf sample data.
+        */
+       DRM_I915_PERF_PROP_SAMPLE_PID,
+
+       /**
+        * The value of this property set to 1 requests inclusion of tag in the
+        * perf sample data.
+        */
+       DRM_I915_PERF_PROP_SAMPLE_TAG,
+
+       /**
+        * The value of this property set to 1 requests inclusion of timestamp
+        * in the perf sample data.
+        */
+       DRM_I915_PERF_PROP_SAMPLE_TS,
+
+       /**
+        * This property requests inclusion of mmio register values in the perf
+        * sample data. The value of this property specifies the address of user
+        * struct having the register addresses.
+        */
+       DRM_I915_PERF_PROP_SAMPLE_MMIO,
+
        DRM_I915_PERF_PROP_MAX /* non-ABI */
 };
 
@@ -1403,6 +1470,12 @@ enum drm_i915_perf_record_type {
         * struct {
         *     struct drm_i915_perf_record_header header;
         *
+        *     { u64 source; } && DRM_I915_PERF_PROP_SAMPLE_OA_SOURCE
+        *     { u64 ctx_id; } && DRM_I915_PERF_PROP_SAMPLE_CTX_ID
+        *     { u64 pid; } && DRM_I915_PERF_PROP_SAMPLE_PID
+        *     { u64 tag; } && DRM_I915_PERF_PROP_SAMPLE_TAG
+        *     { u64 timestamp; } && DRM_I915_PERF_PROP_SAMPLE_TS
+        *     { u32 mmio[]; } && DRM_I915_PERF_PROP_SAMPLE_MMIO
         *     { u32 oa_report[]; } && DRM_I915_PERF_PROP_SAMPLE_OA
         * };
         */
-- 
1.9.1

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