[PATCH V2 21/23] drm/etnaviv: need to disable clock gating when doing profiling

[Christian Gmeiner]

As done by Vivante kernel driver.

Signed-off-by: Christian Gmeiner <christian.gmei...@gmail.com>
Reviewed-by: Lucas Stach <l.st...@pengutronix.de>
---
 drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c 
b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
index c176781788ac..5964ee36d93b 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
@@ -1335,6 +1335,13 @@ static void sync_point_perfmon_sample(struct etnaviv_gpu 
*gpu,
 static void sync_point_perfmon_sample_pre(struct etnaviv_gpu *gpu,
        struct etnaviv_event *event)
 {
+       u32 val;
+
+       /* disable clock gating */
+       val = gpu_read(gpu, VIVS_PM_POWER_CONTROLS);
+       val &= ~VIVS_PM_POWER_CONTROLS_ENABLE_MODULE_CLOCK_GATING;
+       gpu_write(gpu, VIVS_PM_POWER_CONTROLS, val);
+
        sync_point_perfmon_sample(gpu, event, ETNA_PM_PROCESS_PRE);
 }
 
@@ -1343,6 +1350,7 @@ static void sync_point_perfmon_sample_post(struct 
etnaviv_gpu *gpu,
 {
        const struct etnaviv_cmdbuf *cmdbuf = event->cmdbuf;
        unsigned int i;
+       u32 val;
 
        sync_point_perfmon_sample(gpu, event, ETNA_PM_PROCESS_POST);
 
@@ -1351,6 +1359,11 @@ static void sync_point_perfmon_sample_post(struct 
etnaviv_gpu *gpu,
 
                *pmr->bo_vma = pmr->sequence;
        }
+
+       /* enable clock gating */
+       val = gpu_read(gpu, VIVS_PM_POWER_CONTROLS);
+       val |= VIVS_PM_POWER_CONTROLS_ENABLE_MODULE_CLOCK_GATING;
+       gpu_write(gpu, VIVS_PM_POWER_CONTROLS, val);
 }
 
 
-- 
2.13.3

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