Please add a short description, stating that the perfmon registers are debug regs.
Am Freitag, den 09.06.2017, 12:26 +0200 schrieb Christian Gmeiner: > Signed-off-by: Christian Gmeiner <christian.gmei...@gmail.com> Reviewed-by: Lucas Stach <l.st...@pengutronix.de> > --- > drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c > b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c > index 1e23472..faf2925 100644 > --- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c > +++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c > @@ -1336,6 +1336,11 @@ static void > sync_point_perfmon_sample_pre(struct etnaviv_gpu *gpu, > val &= ~VIVS_PM_POWER_CONTROLS_ENABLE_MODULE_CLOCK_GATING; > gpu_write(gpu, VIVS_PM_POWER_CONTROLS, val); > > + /* enable debug register */ > + val = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL); > + val &= ~VIVS_HI_CLOCK_CONTROL_DISABLE_DEBUG_REGISTERS; > + gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, val); > + > sync_point_perfmon_sample(gpu, event, ETNA_PM_PROCESS_PRE); > } > > @@ -1353,6 +1358,11 @@ static void > sync_point_perfmon_sample_post(struct etnaviv_gpu *gpu, > *pmr->bo_vma = pmr->sequence; > } > > + /* disable debug register */ > + val = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL); > + val |= VIVS_HI_CLOCK_CONTROL_DISABLE_DEBUG_REGISTERS; > + gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, val); > + > /* enable clock gating */ > val = gpu_read(gpu, VIVS_PM_POWER_CONTROLS); > val |= VIVS_PM_POWER_CONTROLS_ENABLE_MODULE_CLOCK_GATING; _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
