2017-02-02 19:26 GMT-02:00 Fabio Estevam <feste...@gmail.com>: > > From: Fabio Estevam <fabio.este...@nxp.com> > > Currently the framebuffer content is displayed with incorrect offsets > in both the vertical and horizontal directions. > > The fbdev version of the driver does not show this problem. Breno Lima > dumped the eLCDIF controller registers on both the drm and fbdev drivers > and noticed that the VDCTRL3 register is configured incorrectly in the > drm driver. > > The fbdev driver calculates the vertical and horizontal wait counts > of the VDCTRL3 register by doing: back porch + sync length. > > Looking at the horizontal and vertical timing diagram from > include/drm/drm_modes.h this value corresponds to: > > crtc_[hv]total - crtc_[hv]sync_start > > So fix the VDCTRL3 register setting accordingly so that the eLCDIF > controller can properly show the framebuffer content in the correct > position. > > Reported-by: Breno Lima <breno.l...@nxp.com> > Signed-off-by: Fabio Estevam <fabio.este...@nxp.com> > --- > drivers/gpu/drm/mxsfb/mxsfb_crtc.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c > index e10a4ed..b56f86c 100644 > --- a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c > +++ b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c > @@ -184,8 +184,8 @@ static void mxsfb_crtc_mode_set_nofb(struct mxsfb_drm_private *mxsfb) > VDCTRL2_SET_HSYNC_PERIOD(m->crtc_htotal), > mxsfb->base + LCDC_VDCTRL2); > > - writel(SET_HOR_WAIT_CNT(m->crtc_hblank_end - m->crtc_hsync_end) | > - SET_VERT_WAIT_CNT(m->crtc_vblank_end - m->crtc_vsync_end), > + writel(SET_HOR_WAIT_CNT(m->crtc_htotal - m->crtc_hsync_start) | > + SET_VERT_WAIT_CNT(m->crtc_vtotal - m->crtc_vsync_start), > mxsfb->base + LCDC_VDCTRL3); > > writel(SET_DOTCLK_H_VALID_DATA_CNT(m->hdisplay), > -- > 2.7.4 >
Tested-by: Breno Lima <breno.l...@nxp.com>
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