Am 31.05.2016 um 01:11 schrieb Edmondo Tommasina:
> Signed-off-by: Edmondo Tommasina <edmondo.tommasina at gmail.com>
Reviewed-by: Christian König <christian.koenig at amd.com>
> ---
> drivers/gpu/drm/radeon/evergreen_cs.c | 7 +++++++
> drivers/gpu/drm/radeon/evergreend.h | 1 +
> drivers/gpu/drm/radeon/radeon_drv.c | 3 ++-
> 3 files changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c
> b/drivers/gpu/drm/radeon/evergreen_cs.c
> index 0d3f744..d960d39 100644
> --- a/drivers/gpu/drm/radeon/evergreen_cs.c
> +++ b/drivers/gpu/drm/radeon/evergreen_cs.c
> @@ -2209,6 +2209,12 @@ static int evergreen_packet3_check(struct
> radeon_cs_parser *p,
> }
> break;
> }
> + case PACKET3_PFP_SYNC_ME:
> + if (pkt->count) {
> + DRM_ERROR("bad PFP_SYNC_ME\n");
> + return -EINVAL;
> + }
> + break;
> case PACKET3_SURFACE_SYNC:
> if (pkt->count != 3) {
> DRM_ERROR("bad SURFACE_SYNC\n");
> @@ -3381,6 +3387,7 @@ static int evergreen_vm_packet3_check(struct
> radeon_device *rdev,
> case PACKET3_MPEG_INDEX:
> case PACKET3_WAIT_REG_MEM:
> case PACKET3_MEM_WRITE:
> + case PACKET3_PFP_SYNC_ME:
> case PACKET3_SURFACE_SYNC:
> case PACKET3_EVENT_WRITE:
> case PACKET3_EVENT_WRITE_EOP:
> diff --git a/drivers/gpu/drm/radeon/evergreend.h
> b/drivers/gpu/drm/radeon/evergreend.h
> index 0b174e1..c8e3d39 100644
> --- a/drivers/gpu/drm/radeon/evergreend.h
> +++ b/drivers/gpu/drm/radeon/evergreend.h
> @@ -1624,6 +1624,7 @@
> */
> # define PACKET3_CP_DMA_CMD_SAIC (1 << 28)
> # define PACKET3_CP_DMA_CMD_DAIC (1 << 29)
> +#define PACKET3_PFP_SYNC_ME 0x42
> #define PACKET3_SURFACE_SYNC 0x43
> # define PACKET3_CB0_DEST_BASE_ENA (1 << 6)
> # define PACKET3_CB1_DEST_BASE_ENA (1 << 7)
> diff --git a/drivers/gpu/drm/radeon/radeon_drv.c
> b/drivers/gpu/drm/radeon/radeon_drv.c
> index b55aa74..36242a9 100644
> --- a/drivers/gpu/drm/radeon/radeon_drv.c
> +++ b/drivers/gpu/drm/radeon/radeon_drv.c
> @@ -95,9 +95,10 @@
> * 2.43.0 - RADEON_INFO_GPU_RESET_COUNTER
> * 2.44.0 - SET_APPEND_CNT packet3 support
> * 2.45.0 - Allow setting shader registers using DMA/COPY packet3 on SI
> + * 2.46.0 - Add PFP_SYNC_ME support on evergreen
> */
> #define KMS_DRIVER_MAJOR 2
> -#define KMS_DRIVER_MINOR 45
> +#define KMS_DRIVER_MINOR 46
> #define KMS_DRIVER_PATCHLEVEL 0
> int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
> int radeon_driver_unload_kms(struct drm_device *dev);
