On 24.05.2016 06:04, Alex Deucher wrote: > Need to properly update the sw ring status when we disable > the gfx MEs on SI. > > Signed-off-by: Alex Deucher <alexander.deucher at amd.com> > --- > drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c > b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c > index b9093a6..561d67a 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c > @@ -1464,6 +1464,8 @@ static void gfx_v6_0_cp_gfx_enable(struct amdgpu_device > *adev, bool enable) > WREG32(SCRATCH_UMSK, 0); > for (i = 0; i < adev->gfx.num_gfx_rings; i++) > adev->gfx.gfx_ring[i].ready = false; > + for (i = 0; i < adev->gfx.num_compute_rings; i++) > + adev->gfx.compute_ring[i].ready = false; > } > udelay(50); > } >
Reviewed-by: Michel Dänzer <michel.daenzer at amd.com> -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast | Mesa and X developer
