Am 01.07.2016 um 16:22 schrieb Andrew F. Davis:
> Found with scripts/coccinelle/misc/boolconv.cocci.
>
> Signed-off-by: Andrew F. Davis <afd at ti.com>
For both patches Reviewed-by: Christian König <christian.koenig at amd.com>.
> ---
> drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 8 ++++----
> drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 4 ++--
> drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 4 ++--
> drivers/gpu/drm/amd/amdgpu/vi.c | 14 +++++++-------
> 4 files changed, 15 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> index 1a5cbaf..f3c8c37 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> @@ -5144,13 +5144,13 @@ static int gfx_v8_0_set_powergating_state(void
> *handle,
> case CHIP_POLARIS11:
> if (adev->pg_flags & AMD_PG_SUPPORT_GFX_SMG)
> polaris11_enable_gfx_static_mg_power_gating(adev,
> - state == AMD_PG_STATE_GATE ? true :
> false);
> + state == AMD_PG_STATE_GATE);
> else if (adev->pg_flags & AMD_PG_SUPPORT_GFX_DMG)
> polaris11_enable_gfx_dynamic_mg_power_gating(adev,
> - state == AMD_PG_STATE_GATE ? true :
> false);
> + state == AMD_PG_STATE_GATE);
> else
> polaris11_enable_gfx_quick_mg_power_gating(adev,
> - state == AMD_PG_STATE_GATE ? true :
> false);
> + state == AMD_PG_STATE_GATE);
> break;
> default:
> break;
> @@ -5583,7 +5583,7 @@ static int gfx_v8_0_set_clockgating_state(void *handle,
> case CHIP_CARRIZO:
> case CHIP_STONEY:
> gfx_v8_0_update_gfx_clock_gating(adev,
> - state == AMD_CG_STATE_GATE ?
> true : false);
> + state == AMD_CG_STATE_GATE);
> break;
> default:
> break;
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> index 9945d5b..6c3c730 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> @@ -1406,9 +1406,9 @@ static int gmc_v8_0_set_clockgating_state(void *handle,
> switch (adev->asic_type) {
> case CHIP_FIJI:
> fiji_update_mc_medium_grain_clock_gating(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> fiji_update_mc_light_sleep(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> break;
> default:
> break;
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
> b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
> index 532ea88..e57cab6 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
> @@ -1547,9 +1547,9 @@ static int sdma_v3_0_set_clockgating_state(void *handle,
> case CHIP_CARRIZO:
> case CHIP_STONEY:
> sdma_v3_0_update_sdma_medium_grain_clock_gating(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> sdma_v3_0_update_sdma_medium_grain_light_sleep(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> break;
> default:
> break;
> diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
> index a65c960..d3404ef 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vi.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vi.c
> @@ -1393,22 +1393,22 @@ static int vi_common_set_clockgating_state(void
> *handle,
> switch (adev->asic_type) {
> case CHIP_FIJI:
> vi_update_bif_medium_grain_light_sleep(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> vi_update_hdp_medium_grain_clock_gating(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> vi_update_hdp_light_sleep(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> vi_update_rom_medium_grain_clock_gating(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> break;
> case CHIP_CARRIZO:
> case CHIP_STONEY:
> vi_update_bif_medium_grain_light_sleep(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> vi_update_hdp_medium_grain_clock_gating(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> vi_update_hdp_light_sleep(adev,
> - state == AMD_CG_STATE_GATE ? true : false);
> + state == AMD_CG_STATE_GATE);
> break;
> default:
> break;
