Am Dienstag, den 19.01.2016, 08:05 +0100 schrieb Christian Gmeiner:
> The varyings count is stored as part of register VIVS_HI_CHIP_SPECS_3.
> Userspace still needs to validate the returned values as it can be 0
> like on the imx6q.
>
We already fix up some of those register values in the kernel if we know
they are wrong for a certain core implementation. I don't want to spread
the workarounds between kernel and userspace, but keep them in a single
place. As we already started to fix things up in the kernel, please
return the correct value for MX6Q to userspace.
Thanks,
Lucas
> Signed-off-by: Christian Gmeiner <christian.gmeiner at gmail.com>
> ---
> drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 11 +++++++++-
> drivers/gpu/drm/etnaviv/etnaviv_gpu.h | 3 +++
> drivers/gpu/drm/etnaviv/state_hi.xml.h | 37
> ++++++++++++++++++++++++++++++++--
> include/uapi/drm/etnaviv_drm.h | 1 +
> 4 files changed, 49 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
> b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
> index 056a72e..e4f6008 100644
> --- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
> +++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
> @@ -112,6 +112,10 @@ int etnaviv_gpu_get_param(struct etnaviv_gpu *gpu, u32
> param, u64 *value)
> *value = gpu->identity.num_constants;
> break;
>
> + case ETNAVIV_PARAM_GPU_NUM_VARYINGS:
> + *value = gpu->identity.num_varyings;
> + break;
> +
> default:
> DBG("%s: invalid param: %u", dev_name(gpu->dev), param);
> return -EINVAL;
> @@ -124,10 +128,11 @@ static void etnaviv_hw_specs(struct etnaviv_gpu *gpu)
> {
> if (gpu->identity.minor_features0 &
> chipMinorFeatures0_MORE_MINOR_FEATURES) {
> - u32 specs[2];
> + u32 specs[3];
>
> specs[0] = gpu_read(gpu, VIVS_HI_CHIP_SPECS);
> specs[1] = gpu_read(gpu, VIVS_HI_CHIP_SPECS_2);
> + specs[2] = gpu_read(gpu, VIVS_HI_CHIP_SPECS_3);
>
> gpu->identity.stream_count =
> (specs[0] & VIVS_HI_CHIP_SPECS_STREAM_COUNT__MASK)
> @@ -160,6 +165,10 @@ static void etnaviv_hw_specs(struct etnaviv_gpu *gpu)
> gpu->identity.num_constants =
> (specs[1] & VIVS_HI_CHIP_SPECS_2_NUM_CONSTANTS__MASK)
> >> VIVS_HI_CHIP_SPECS_2_NUM_CONSTANTS__SHIFT;
> +
> + gpu->identity.num_varyings =
> + (specs[2] & VIVS_HI_CHIP_SPECS_3_VARYINGS_COUNT__MASK)
> + >> VIVS_HI_CHIP_SPECS_3_VARYINGS_COUNT__SHIFT;
> }
>
> /* Fill in the stream count if not specified */
> diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.h
> b/drivers/gpu/drm/etnaviv/etnaviv_gpu.h
> index c75d503..259012d 100644
> --- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.h
> +++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.h
> @@ -75,6 +75,9 @@ struct etnaviv_chip_identity {
>
> /* Buffer size */
> u32 buffer_size;
> +
> + /* varyings count */
> + u32 num_varyings;
> };
>
> struct etnaviv_event {
> diff --git a/drivers/gpu/drm/etnaviv/state_hi.xml.h
> b/drivers/gpu/drm/etnaviv/state_hi.xml.h
> index 0064f26..2dc7aa2 100644
> --- a/drivers/gpu/drm/etnaviv/state_hi.xml.h
> +++ b/drivers/gpu/drm/etnaviv/state_hi.xml.h
> @@ -8,8 +8,12 @@ http://0x04.net/cgit/index.cgi/rules-ng-ng
> git clone git://0x04.net/rules-ng-ng
>
> The rules-ng-ng source files this header was generated from are:
> -- state_hi.xml ( 23420 bytes, from 2015-03-25 11:47:21)
> -- common.xml ( 18437 bytes, from 2015-03-25 11:27:41)
> +- state.xml ( 18940 bytes, from 2015-12-12 08:59:16)
> +- common.xml ( 18379 bytes, from 2014-07-14 14:44:55)
> +- state_hi.xml ( 24309 bytes, from 2015-12-12 09:02:53)
> +- state_2d.xml ( 51520 bytes, from 2015-12-12 08:59:16)
> +- state_3d.xml ( 54570 bytes, from 2014-07-14 14:44:55)
> +- state_vg.xml ( 5942 bytes, from 2014-07-14 14:44:55)
>
> Copyright (C) 2015
> */
> @@ -182,8 +186,25 @@ Copyright (C) 2015
>
> #define VIVS_HI_CHIP_MINOR_FEATURE_3 0x00000088
>
> +#define VIVS_HI_CHIP_SPECS_3 0x0000008c
> +#define VIVS_HI_CHIP_SPECS_3_VARYINGS_COUNT__MASK 0x000001f0
> +#define VIVS_HI_CHIP_SPECS_3_VARYINGS_COUNT__SHIFT 4
> +#define VIVS_HI_CHIP_SPECS_3_VARYINGS_COUNT(x) (((x)
> << VIVS_HI_CHIP_SPECS_3_VARYINGS_COUNT__SHIFT) &
> VIVS_HI_CHIP_SPECS_3_VARYINGS_COUNT__MASK)
> +#define VIVS_HI_CHIP_SPECS_3_GPU_CORE_COUNT__MASK 0x00000007
> +#define VIVS_HI_CHIP_SPECS_3_GPU_CORE_COUNT__SHIFT 0
> +#define VIVS_HI_CHIP_SPECS_3_GPU_CORE_COUNT(x) (((x)
> << VIVS_HI_CHIP_SPECS_3_GPU_CORE_COUNT__SHIFT) &
> VIVS_HI_CHIP_SPECS_3_GPU_CORE_COUNT__MASK)
> +
> #define VIVS_HI_CHIP_MINOR_FEATURE_4 0x00000094
>
> +#define VIVS_HI_CHIP_SPECS_4 0x0000009c
> +#define VIVS_HI_CHIP_SPECS_4_STREAM_COUNT__MASK
> 0x0001f000
> +#define VIVS_HI_CHIP_SPECS_4_STREAM_COUNT__SHIFT 12
> +#define VIVS_HI_CHIP_SPECS_4_STREAM_COUNT(x) (((x) <<
> VIVS_HI_CHIP_SPECS_4_STREAM_COUNT__SHIFT) &
> VIVS_HI_CHIP_SPECS_4_STREAM_COUNT__MASK)
> +
> +#define VIVS_HI_CHIP_MINOR_FEATURE_5 0x000000a0
> +
> +#define VIVS_HI_CHIP_PRODUCT_ID
> 0x000000a8
> +
> #define VIVS_PM
> 0x00000000
>
> #define VIVS_PM_POWER_CONTROLS
> 0x00000100
> @@ -201,11 +222,23 @@ Copyright (C) 2015
> #define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_FE
> 0x00000001
> #define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_DE
> 0x00000002
> #define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_PE
> 0x00000004
> +#define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_SH
> 0x00000008
> +#define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_PA
> 0x00000010
> +#define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_SE
> 0x00000020
> +#define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA
> 0x00000040
> +#define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_TX
> 0x00000080
> +#define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA_EZ
> 0x00010000
> +#define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA_HZ
> 0x00020000
>
> #define VIVS_PM_MODULE_STATUS
> 0x00000108
> #define VIVS_PM_MODULE_STATUS_MODULE_CLOCK_GATED_FE 0x00000001
> #define VIVS_PM_MODULE_STATUS_MODULE_CLOCK_GATED_DE 0x00000002
> #define VIVS_PM_MODULE_STATUS_MODULE_CLOCK_GATED_PE 0x00000004
> +#define VIVS_PM_MODULE_STATUS_MODULE_CLOCK_GATED_SH 0x00000008
> +#define VIVS_PM_MODULE_STATUS_MODULE_CLOCK_GATED_PA 0x00000010
> +#define VIVS_PM_MODULE_STATUS_MODULE_CLOCK_GATED_SE 0x00000020
> +#define VIVS_PM_MODULE_STATUS_MODULE_CLOCK_GATED_RA 0x00000040
> +#define VIVS_PM_MODULE_STATUS_MODULE_CLOCK_GATED_TX 0x00000080
>
> #define VIVS_PM_PULSE_EATER 0x0000010c
>
> diff --git a/include/uapi/drm/etnaviv_drm.h b/include/uapi/drm/etnaviv_drm.h
> index 4cc989a..f195e29 100644
> --- a/include/uapi/drm/etnaviv_drm.h
> +++ b/include/uapi/drm/etnaviv_drm.h
> @@ -59,6 +59,7 @@ struct drm_etnaviv_timespec {
> #define ETNAVIV_PARAM_GPU_BUFFER_SIZE 0x17
> #define ETNAVIV_PARAM_GPU_INSTRUCTION_COUNT 0x18
> #define ETNAVIV_PARAM_GPU_NUM_CONSTANTS 0x19
> +#define ETNAVIV_PARAM_GPU_NUM_VARYINGS 0x20
>
> #define ETNA_MAX_PIPES 4
>
--
Pengutronix e.K. | Lucas Stach |
Industrial Linux Solutions | http://www.pengutronix.de/ |
